IP Library Granted Patent US 11,676,004
Granted Patent B2
US 11,676,004 · App. 15/677,311 · Granted Jun 13, 2023

Architecture optimized training of neural networks

Inventors: Kristof Denolf (Los Gatos, CA); Kornelis A. Vissers (Sunnyvale, CA)
Assignee: XILINX, INC.
G06N3/08G06N3/04G06N3/063G06N3/084
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Quick Facts
Patent No.
US 11,676,004
App. No.
15/677,311
Granted
Jun 13, 2023
Kind
B2
Abstract

An example a method of optimizing a neural network having a plurality of layers includes: obtaining an architecture constraint for circuitry of an inference platform that implements the neural network; training the neural network on a training platform to generate network parameters and feature maps for the plurality of layers; and constraining the network parameters, the feature maps, or both based on the architecture constraint.

Claims (34)

1. A method of optimizing a neural network having a plurality of layers, the method comprising:

obtaining architecture constraints for circuitry of an inference platform that implements the neural network, wherein the architecture constraints comprise a first architecture constraint based on structure of the circuitry of the inference platform and a related data parameter constraint;

training the neural network on a training platform using the architecture constraints to generate network parameters and feature maps for the plurality of layers; and

constraining, during the training of the neural network, the network parameters, the feature maps, or both the network parameters and the feature maps, based on the architecture constraints.

2. The method of claim 1 , wherein the step of constraining is performed using a maximum number of the architecture constraints that achieves a desired accuracy for the neural network.

3. The method of claim 1 , further comprising:

re-training the neural network on the training platform using constrained network parameters, constrained feature maps, or both constrained network parameters and constrained feature maps to generate new network parameters.

4. The method of claim 1 , wherein the first architecture constraint includes one or more constraints based on compute functionality of the circuitry of the inference platform.

5. The method of claim 4 , wherein the compute functionality includes a structure of multiply-accumulate circuitry of the inference platform and data width constraints.

6. The method of claim 1 , wherein the architecture constraints further comprise a second architecture constraint based on the structure of the circuitry of the inference platform, and wherein the method further comprises:

re-training the neural network using the first architecture constraint, the data parameter constraint, and the second architecture constraint to generate updated network parameters and updated feature maps; and

constraining, during re-training the neural network, the constrained network parameters, the constrained feature maps, or both the constrained network parameters and the constrained feature maps, based on the second architecture constraint.

7. The method of claim 1 , wherein the first architecture constraint includes a first weight and a second weight, and wherein a magnitude of the first weight is equal to a magnitude of the second weight.

8. A computing system, comprising:

a hardware platform for training a neural network, the hardware platform including at least one processor, a memory, and a training platform;

a software platform, executing on the hardware platform, the software platform including program code, stored in the memory, executable by the at least one processor to perform functions of:

obtaining architecture constraints for circuitry of an inference platform that implements the neural network, wherein the architecture constraints comprise a first architecture constraint based on structure of the circuitry of the inference platform and a related data parameter constraint;

training the neural network on the training platform using the architecture constraints to generate network parameters and feature maps for plurality of layers of the neural network; and

constraining, during the training of the neural network, the network parameters, the feature maps, or both the network parameters and the feature maps based on the architecture constraints.

9. The computing system of claim 8 , wherein the program code is executable to perform the function of constraining using a maximum number of the architecture constraints that achieves a desired accuracy for the neural network.

10. The computing system of claim 8 , wherein the program code is executable to perform a function of:

re-training the neural network on the training platform using constrained network parameters, constrained feature maps, or both constrained network parameters and constrained feature maps to generate new network parameters.

11. The computing system of claim 8 , wherein the first architecture constraint includes one or more constraints based on compute functionality of the circuitry of the inference platform.

12. The computing system of claim 11 , wherein the compute functionality includes a structure of multiply-accumulate circuitry of the inference platform and data width constraints.

13. The computer system of claim 8 , wherein the architecture constraints further comprise a second architecture constraint based on the structure of the circuitry of the inference platform, and wherein the at least one processor further performs the function of:

re-training the neural network using the first architecture constraint, the data parameter constraint, and the second architecture constraint to generate updated network parameters and updated feature maps; and

constraining, during re-training the neural network, the constrained network parameters, the constrained feature maps, or both the constrained network parameters and the constrained feature maps, based on the second architecture constraint.

14. The computer system of claim 8 , wherein the first architecture constraint includes a first weight and a second weight, and wherein a magnitude of the first weight is equal to a magnitude of the second weight.

15. A non-transitory computer readable medium having instructions stored thereon that when executed by a processor cause the processor to perform a method of optimizing a neural network having a plurality of layers, the method comprising:

obtaining architecture constraints for circuitry of an inference platform that implements the neural network, wherein the architecture constraints comprise a first architecture constraint based on structure of the circuitry of the inference platform and a related data parameter constraint;

training the neural network on a training platform using the architecture constraints to generate network parameters and feature maps for the plurality of layers; and

constraining, during the training of the neural network, the network parameters, the feature maps, or both the network parameters and the feature maps based on the architecture constraints.

16. The non-transitory computer readable medium of claim 15 , wherein the first architecture constraint includes one or more constraints based on compute functionality of the circuitry of the inference platform.

17. The non-transitory computer readable medium of claim 16 , wherein the compute functionality includes a structure of multiply-accumulate circuitry of the inference platform and data width constraints.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2017
From: DENOLF, KRISTOF; VISSERS, KORNELIS A.
To: XILINX, INC.
Reel/Frame 043295/0538 →
Continuity (1)
Related Publication 20190057305A1 · Feb 21, 2019
Cited By (1)
US 12,737,609