IP Library › Granted Patent US 11,677,005
Granted Patent B2
US 11,677,005 · App. 16/962,922 · Granted Jun 13, 2023

Semiconductor device and method for manufacturing the same

Inventors: Taishi Kimura (Nagakute, JP); Daisuke Nakamura (Nagakute, JP); Tetsuo Narita (Nagakute, JP); Keita Kataoka (Nagakute, JP)
Assignee: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO
H01L29/2003H01L21/0254H01L21/0262H01L29/0619
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Quick Facts
Patent No.
US 11,677,005
App. No.
16/962,922
Granted
Jun 13, 2023
Kind
B2
Abstract

A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1×10 15 cm −3 or more and 1×10 20 cm −3 or less, the concentration of C impurities is 1×10 16 cm −3 or less, the concentration of O impurities is 1×10 16 cm −3 or less, the concentration of Ca impurities is 1×10 16 cm −3 or less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

Claims (62)

1. A semiconductor device comprising:

a substrate;

an n-type layer including a nitride semiconductor (A) formed on the surface of the substrate; and

a p-type layer formed adjacent to an upper surface or a lower surface of the n-type layer, wherein

in the n-type layer,

a concentration of donor impurities (excluding O) is 1×10 15 cm −3 or more and 1×10 20 cm −3 or less,

a concentration of C impurities is 1×10 16 cm −3 or less,

a concentration of O impurities is 1×10 16 cm −3 or less,

a concentration of Ca impurities is 1×10 16 cm −3 or less, and

a sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities

the p-type layer includes a nitride semiconductor (C) of a same type as or of a different type from the nitride semiconductor (A) constituting the n-type layer, in which

a concentration of acceptor impurities (excluding C and Ca) is 1×10 15 cm −3 or more and 1×10 20 cm −3 or less,

a concentration of C impurities is 1×10 16 cm −3 or less,

a concentration of O impurities is 1×10 16 cm −3 or less,

a concentration of Ca impurities is 1×10 16 cm −3 or less, and

a sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the acceptor impurities,

the surface of the n-type layer on the p-type layer side does not include an Si segregation region in which the Si concentration is two times or more the concentration of the Si in the n-type layer, and

the surface of the n-type layer on the p-type layer side does not include a Ca segregation region in which the Ca concentration is 1×10 16 cm −3 or more.

2. The semiconductor device according to claim 1 ,

wherein the concentration of the donor impurities in the n-type layer is 5×10 15 cm −3 or more and 1×10 18 cm −3 or less.

3. The semiconductor device according to claim 1 ,

wherein the nitride semiconductor (A) includes GaN, and

the donor impurities include Si and/or Ge.

4. The semiconductor device according to claim 1 ,

wherein the thickness of the n-type layer is 3 μm or more.

5. The semiconductor device according to claim 1 ,

wherein the substrate includes:

(a) sapphire;

(b) SiC; or

(c) a nitride semiconductor (B) of a same type as or of a different type from the nitride semiconductor (A) constituting the n-type layer.

6. The semiconductor device according to claim 5 ,

wherein the nitride semiconductor (B) includes GaN.

7. The semiconductor device according to claim 1 ,

wherein the nitride semiconductor (C) includes GaN, and

the acceptor impurities include Mg.

8. The semiconductor device according to claim 1 , further comprising:

an i-type layer formed between the n-type layer and the p-type layer,

wherein the i-type layer incudes a nitride semiconductor (D) of the same type as or of a different type from the nitride semiconductor (A) constituting the n-type layer, and in which the concentration of the donor impurities is at least two orders of magnitude lower than the n-type layer and the concentration of the acceptor impurities is at least two orders of magnitude lower than the p-type layer.

9. The semiconductor device according to claim 8 ,

wherein the nitride semiconductor (D) includes GaN.

10. A method for manufacturing the semiconductor device of claim 1 , comprising:

a first step of using a halogen-free vapor phase epitaxy (HF-VPE) device and forming, on a substrate surface, either:

(a) an n-type layer including a nitride semiconductor (A) in which a concentration of donor impurities (excluding O) is 1×10 15 cm −3 or more and 1×10 20 cm −3 or less, a concentration of C impurities is 1×10 16 cm −3 or less, the concentration of O impurities is 1×10 16 cm −3 or less, a concentration of Ca impurities is 1×10 16 cm −3 or less, and a sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities, or

(b) a p-type layer including a nitride semiconductor (C) of a same type as or of a different type from the nitride semiconductor (A) constituting the n-type layer, in which a concentration of acceptor impurities (excluding C and Ca) is 1×10 15 cm −3 or more and 1×10 20 cm −3 or less, a concentration of C impurities is 1×10 16 cm −3 or less, a concentration of O impurities is 1×10 16 cm −3 or less, a concentration of Ca impurities is 1×10 16 cm −3 or less, and a sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the acceptor impurities, and

a second step of also forming, in the HF-VPE device, the p-type layer or the n-type layer on the surface of the substrate on which the n-type layer or the p-type layer has been formed, continuously without exposing the substrate to the atmosphere, wherein

the HF-VPE device includes:

a crystal growth section having a susceptor to hold a substrate;

a gas supply section to supply a metal-contained gas (gas containing a metal vapor) generated from a metal source and a reactant gas, the reactant gas reacting with the metal-contained gas to form an inorganic compound, toward the substrate; and

a heating section having a heating unit to heat the substrate and the metal source,

wherein the gas supply section includes:

a first crucible disposed separately from the susceptor and holding the metal source;

a carrier gas supply unit that supplies a carrier gas into the first crucible, and supplies a mixed gas of the metal-contained gas and the carrier gas toward the substrate; and

a reactant gas supply unit to supply the reactant gas toward the substrate, and

wherein a porous baffle plate is provided in the opening of the first crucible.

11. The method for manufacturing a semiconductor device according to claim 10 ,

wherein the nitride semiconductor (A) and the nitride semiconductor (C) each include GaN,

the donor impurities include Si and/or Ge, and

the acceptor impurities include Mg.

12. The method for manufacturing a semiconductor device according to claim 10 , further comprising a third step between the first step and the second step, the third step forming an i-type layer,

wherein the i-type layer includes a nitride semiconductor (D) of a same type as or of a different type from the nitride semiconductor (A) constituting the n-type layer, in which the concentration of the donor impurities is at least two orders of magnitude lower than the n-type layer and the concentration of the acceptor impurities is at least two orders of magnitude lower than the p-type layer.

13. The method for manufacturing a semiconductor device according to claim 12 ,

wherein the nitride semiconductor (D) includes GaN.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2020
From: KIMURA, TAISHI; NAKAMURA, DAISUKE; NARITA, TETSUO; KATAOKA, KEITA
To: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO
Reel/Frame 053238/0826 →
Priority Claims (1)
JP JP2018-046361 · Mar 14, 2018 · national
Continuity (1)
Related Publication 20210134962A1 · May 6, 2021