IP Library Granted Patent US 11,677,036
Granted Patent B2
US 11,677,036 · App. 17/707,076 · Granted Jun 13, 2023

Meta optical devices and methods of manufacturing the same

Inventors: Jeongyub Lee (Yongin-si, KR); Woong Ko (Seoul, KR); Changseung Lee (Yongin-si, KR); Hongkyu Park (Hwaseong-si, KR); Chanwook Baik (Yongin-si, KR); Hongseok Lee (Seoul, KR); Wonjae Joo (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L31/035281H01L27/1443H01L27/1446H01L31/02005H01L31/02019H01L31/0288H01L31/022408H01L31/105H01L31/1804H01L31/1864
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,677,036
App. No.
17/707,076
Granted
Jun 13, 2023
Kind
B2
Abstract

A meta optical device configured to sense incident light includes a plurality of nanorods each having a shape dimension less than a wavelength of the incident light. Each nanorod includes a first conductivity type semiconductor layer, an intrinsic semiconductor layer, and a second conductivity type semiconductor layer. The meta optical device may separate and sense wavelengths of the incident light.

Claims (37)

1. A method of manufacturing a meta optical device, the method comprising:

preparing a dopant-containing layer, the dopant-containing layer including a first conductivity type dopant;

forming a crystalline silicon layer on the dopant-containing layer;

forming a first conductivity type semiconductor layer based on performing a first heat treatment process on the crystalline silicon layer to cause the first conductivity type dopant to move from the dopant-containing layer to a lower portion of the crystalline silicon layer to form the first conductivity type semiconductor layer in the lower portion of the crystalline silicon layer and to cause the dopant-containing layer to become a substrate such that the crystalline silicon layer and the first conductivity type semiconducting layer are located on the substrate;

implanting a second conductivity type dopant into the crystalline silicon layer that is on the substrate; and

forming a second conductivity type semiconductor layer based on performing a second heat treatment process on the crystalline silicon layer that is implanted with the second conductivity type dopant.

2. The method of claim 1 , wherein the preparing of the dopant-containing layer includes implanting the first conductivity type dopant into a silicon oxide substrate.

3. The method of claim 2 , further comprising:

forming a silicon oxide layer on the crystalline silicon layer prior to the implanting of the second conductivity type dopant into the crystalline silicon layer.

4. The method of claim 3 , further comprising:

removing the silicon oxide layer from the second conductivity type semiconductor layer subsequently to performing the second heat treatment process.

5. The method of claim 1 , wherein the preparing of the dopant-containing layer includes forming a borosilicate glass (BSG) layer on a silicon oxide substrate.

6. The method of claim 1 , wherein the forming of the crystalline silicon layer includes depositing a polycrystalline silicon material on the dopant-containing layer.

7. The method of claim 1 , wherein the forming of the crystalline silicon layer includes

bonding a silicon-on-insulator (SOI) substrate to the dopant-containing layer, the SOI substrate including a first monocrystalline silicon layer, an insulating material layer, and a second monocrystalline silicon layer;

removing the second monocrystalline silicon layer from the SOI substrate; and

removing the insulating material layer from the SOI substrate.

8. The method of claim 7 , further comprising:

depositing a silicon oxide layer on the dopant-containing layer, prior to bonding the SOI substrate to the dopant-containing layer, to bond the SOI substrate and the dopant-containing layer together.

9. The method of claim 1 , wherein the first heat treatment process forms a residual layer between the first conductivity type semiconductor layer and the substrate, the residual layer including SiO 2 and the first conductivity type dopant contained in the SiO 2 .

10. A method of manufacturing a meta optical device, the method comprising:

preparing a dopant-containing layer, the dopant-containing layer including a first conductivity type dopant;

forming a crystalline silicon layer on the dopant-containing layer;

forming a first conductivity type semiconductor layer based on performing a first heat treatment process on the crystalline silicon layer;

implanting a second conductivity type dopant into the crystalline silicon layer; and

forming a second conductivity type semiconductor layer based on performing a second heat treatment process on the crystalline silicon layer that is implanted with the second conductivity type dopant,

wherein the first conductivity type dopant includes a p-type dopant, and

wherein the second conductivity type dopant includes an n-type dopant.

11. The method of claim 10 , wherein the n-type dopant includes an element having an atomic weight equal to or greater than about 70.

12. A method of manufacturing a meta optical device, the method comprising:

preparing a dopant-containing layer, the dopant-containing layer including a first conductivity type dopant;

forming a crystalline silicon layer on the dopant-containing layer;

forming a first conductivity type semiconductor layer based on performing a first heat treatment process on the crystalline silicon layer;

implanting a second conductivity type dopant into the crystalline silicon layer;

forming a second conductivity type semiconductor layer based on performing a second heat treatment process on the crystalline silicon layer that is implanted with the second conductivity type dopant; and

patterning the first conductivity type semiconductor layer, the crystalline silicon layer, and the second conductivity type semiconductor layer to form a plurality of nanorods that are electrically isolated from each other.

13. The method of claim 12 , wherein the plurality of nanorods have a particular shape distribution that causes the plurality of nanorods to be configured to function as lenses and color filters.

Priority Claims (1)
KR 10-2019-0133272 · Oct 24, 2019 · national
Continuity (2)
Division 16848165 · Apr 14, 2020
Related Publication 20220223751A1 · Jul 14, 2022