Semiconductor device

1. A semiconductor device performing sequential comparison of an analog input signal and a reference voltage to digitally convert the analog input signal, the semiconductor device comprising:

an upper DAC generating a high-voltage region of the reference voltage based on a predetermined code;

a lower DAC generating a low-voltage region of the reference voltage based on the predetermined code; and

an injection DAC having a same configuration as that of the lower DAC and adjusting the low-voltage region of the reference voltage,

wherein a sampling phase that samples the analog input signal is configured to:

supply a high-order bit of an initial code to the upper DAC;

supply a low-order bit of one-previous output data to the lower DAC; and

supply, to the injection DAC, a low-order bit of inverted data obtained by inverting two-previous output data.

2. The semiconductor device according to claim 1 ,

wherein, at a start of a comparison phase that compares the analog input signal sampled in the sampling phase with the reference voltage,

wherein the high-order bit of the initial code is supplied to the upper DAC,

wherein a low-order bit of the initial code is supplied to the lower DAC, and

wherein a low-order bit of inverted data obtained by inverting one-previous output data is supplied to the injection DAC.

3. The semiconductor device according to claim 2 ,

wherein, at an end of comparison of a high-order bit in the comparison phase,

wherein a high-order bit of current output data is supplied to the upper DAC,

wherein a low-order bit of the initial code is supplied to the lower DAC, and

wherein a low-order bit of inverted data obtained by inverting the one-previous output data is supplied to the injection DAC.

4. The semiconductor device according to claim 3 ,

wherein, at an end of the comparison phase,

wherein a high-order bit of current output data is supplied to the upper DAC,

wherein a low-order bit of the current output data is supplied to the lower DAC, and

wherein a low-order bit of inverted data obtained by inverting the one-previous output data is supplied to the injection DAC.

5. A semiconductor device performing sequential comparison of an analog input signal and a reference voltage to digitally convert the analog input signal, the semiconductor device comprising:

a main ADC digitally converting a low-voltage region of the analog input signal; and

a sub ADC digitally converting a high-voltage region of the analog input signal,

wherein the main ADC includes:

an upper DAC generating a high-voltage region of the reference voltage based on a predetermined code; and

a lower DAC generating a low-voltage region of the reference voltage based on the code,

wherein the sub ADC includes:

a sub upper DAC generating a high-voltage region of the reference voltage based on a predetermined code; and

a sub lower DAC generating a low-voltage region of the reference voltage based on the code,

wherein the sub upper DAC operates at a low-voltage reference, and

wherein output data of the sub DAC is supplied to the upper DAC.

6. The semiconductor device according to claim 5 ,

wherein a low-voltage reference is supplied to the upper DAC when digital conversion of the analog input signal is performed with middle accuracy, and

wherein a high-voltage reference is supplied to the upper DAC when digital conversion of the analog input signal is performed with high accuracy.

7. The semiconductor device according to claim 5 , further comprising a digital multiplication circuit digitally multiplying output data of the sub DAC by a predetermined value,

wherein the output data and the digitally multiplied output data are supplied to the upper DAC.