IP Library Granted Patent US 11,706,995
Granted Patent B2
US 11,706,995 · App. 17/165,837 · Granted Jul 18, 2023

Semiconductor device

Inventors: Chih-Wei Kuo (Tainan, TW); Chia-Chang Hsu (Kaohsiung, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10N50/80H01L27/0248H10B61/22
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,706,995
App. No.
17/165,837
Granted
Jul 18, 2023
Kind
B2
Abstract

A semiconductor device includes an array region defined on a substrate, a ring of dummy pattern surrounding the array region, and a gap between the array region and the ring of dummy pattern. Preferably, the ring of dummy pattern further includes a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region and a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.

Claims (14)

1. A semiconductor device, comprising:

a substrate having an array region defined thereon;

a ring of dummy pattern surrounding the array region, wherein the ring of dummy pattern comprises:

a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region, wherein the ring of MTJ pattern is made of a single MTJ; and

a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.

2. The semiconductor device of claim 1 , further comprising a gap between the array region and the ring of dummy pattern.

3. The semiconductor device of claim 1 , wherein the ring of MTJ pattern comprises:

a first MTJ pattern and a second MTJ pattern extending along a first direction; and

a third MTJ pattern and a fourth MTJ pattern extending along a second direction.

4. The semiconductor device of claim 3 , wherein the first MTJ pattern overlaps the third MTJ pattern at a first corner, the first MTJ pattern overlaps the fourth MTJ pattern at a second corner, the second MTJ pattern overlaps the third MTJ pattern at a third corner, and the second MTJ pattern overlaps the fourth MTJ pattern at a fourth corner.

5. The semiconductor device of claim 1 , wherein the ring of metal interconnect pattern comprises:

a first metal interconnect pattern and a second metal interconnect pattern extending along a first direction; and

a third metal interconnect pattern and a fourth metal interconnect pattern extending along a second direction.

6. The semiconductor device of claim 5 , wherein the first metal interconnect pattern overlaps the third metal interconnect pattern at a first corner, the first metal interconnect pattern overlaps the fourth metal interconnect pattern at a second corner, the second metal interconnect pattern overlaps the third metal interconnect pattern at a third corner, and the second metal interconnect pattern overlaps the fourth metal interconnect pattern at a fourth corner.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2021
From: KUO, CHIH-WEI; HSU, CHIA-CHANG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 055119/0579 →
Priority Claims (1)
CN 202110011336.8 · Jan 6, 2021 · national
Continuity (1)
Related Publication 20220216395A1 · Jul 7, 2022
Cited By (1)
US 12,284,812