Detection and measurement unit for detecting electromagnetic interference, detection system comprising such an analysis unit and analysis method

1. A detection and measurement unit for detecting electromagnetic interference, wherein the detection and measurement unit is configured to receive a digital signal representative of the envelope of an electromagnetic wave received in a given frequency band,

the measurement and detection unit comprising:

a detection subunit configured to compare the amplitude of the digital signal representative of the envelope with a first triggering threshold and a second stopping threshold, the second stopping threshold corresponding to an amplitude less than that corresponding to the first triggering threshold, the detection subunit being furthermore configured to detect an electromagnetic pulse on each new double detection of the passage of the amplitude of the digital signal through the first triggering threshold in a rising edge followed by the passage of the amplitude of the digital signal through the second stopping threshold in a falling edge,

wherein the detection and measurement unit comprises a programmable logic circuit which was previously programmed to act as a detection subunit.

2. The detection and measurement unit according to claim 1 , wherein the detection and measurement unit further comprises a temporal pulse duration measurement subunit communicating with the detection subunit, the temporal pulse duration measurement subunit being configured to measure the pulse duration between the passages by the amplitude of the digital signal of the first triggering threshold in a rising edge and the passage of the second stopping threshold in a falling edge.

3. The detection and measurement unit according to claim 1 , wherein the detection subunit comprises:

a first comparator adapted to compare the amplitude of the digital signal with the first triggering threshold, the first comparator having a first state when the amplitude of the digital signal is less than, or is less than or equal to, the first triggering threshold and a second state otherwise,

a second comparator adapted to compare the amplitude of the digital signal with the second stopping threshold, the second comparator having a third state when the amplitude of the digital signal is greater than, or is greater than or equal to, the second stopping threshold and a fourth state otherwise,

a first latch having a first latch input connected to the first comparator and a second latch input connected to the second comparator, the first latch being configured to switch from a fifth state to a sixth state when the first comparator has the second state, and to switch from the sixth state to the fifth state when the second comparator has the fourth state,

a pulse counter connected to an output of the first latch and configured to count a pulse each time the first latch switches from a state chosen from the sixth state and the fifth state to the other state from the sixth state and the fifth state.

4. The detection and measurement unit according to claim 3 , wherein the detection and measurement unit further comprises a temporal pulse duration measurement subunit communicating with the detection subunit, the temporal pulse duration measurement subunit being configured to measure the pulse duration between the passages by the amplitude of the digital signal of the first triggering threshold in a rising edge and the passage of the second stopping threshold in a falling edge,

wherein the temporal pulse duration measurement subunit comprises:

a first clock configured for have in alternation a seventh state and an eighth state with a first predefined alternating frequency,

a first logic gate having a first gate input connected to an output of the first latch and a second gate input connected to the first clock, the first logic gate being configured to have a ninth state when the first latch has the sixth state and when the clock has the seventh state, the first logic gate having a tenth state the rest of the time,

a pulse duration counter connected to an output of the first logic gate and configured to count a first clock pulsation each time the first logic gate has the ninth state, the number of alternations counted corresponding to the pulse duration.

5. The detection and measurement unit according to claim 1 , further comprising a maximum pulse amplitude measurement subunit capable of measuring a maximum amplitude level reached by the digital signal.

6. The detection and measurement unit according to claim 5 , wherein the maximum pulse amplitude measurement subunit comprises a plurality of comparison units each comprising a third comparator and respective latch,

the third comparator of each comparison unit being adapted to compare the amplitude of the digital signal with a respective third triggering threshold which is distinct from the third triggering threshold of the other third comparators, said third comparator having an eleventh state, when the amplitude of the digital signal is less than, or is less than or equal to, the corresponding third triggering threshold and a twelfth state otherwise,

the third latch of each comparison unit having a third latch input connected to the third comparator of said comparison unit, said third latch being configured to switch from a thirteenth state to a fourteenth state when the third comparator of said comparison unit has the twelfth state,

the comparison units being configured so that the third triggering thresholds of the third comparators are distributed across a range of expected amplitudes for the digital signal.

7. The detection and measurement unit according to claim 1 , further comprising an electromagnetic pulse repeat period measurement subunit.

8. The detection and measurement unit according to claim 3 , further comprising an electromagnetic pulse repeat period measurement subunit,

wherein the electromagnetic pulse repeat period measurement subunit comprises:

a frequency divider configured to switch between a fifteenth state and sixteenth state on each switch of the first latch to a given state chosen from the fifth state and the sixth state,

a double-period number counter connected to an output of the frequency divider and configured to count a double-period each time the frequency divider switches from a state chosen from the fifteenth state and the sixteenth state to the other state from the fifteenth state and the sixteenth state,

a second clock configured for have in alternation a seventeenth state and an eighteenth state with a second predefined alternating frequency,

a second logic gate having a third gate input connected to an output of the frequency divider and a fourth gate input connected to the second clock, the second logic gate being configured to have a nineteenth state when the frequency divider has the fifteenth state and when the second clock has the seventeenth state, the logic gate having a twentieth state the rest of the time,

a period duration counter connected to an output of the second logic gate and configured to count a second clock pulsation each time the frequency divider switches from a state chosen from the fifteenth state and the sixteenth state to the other state from the fifteenth state and the sixteenth state.

9. The detection and measurement unit according to claim further comprising a buffer memory configured to retrieve the value of the period duration counter on each switch of the frequency divider from the sixteenth state to the fifteenth state.

10. The detection and measurement unit according to claim 1 , wherein the detection subunit is configured to receive a reset signal and to carry out, on receiving this reset signal, a supply of a number of electromagnetic pulses detected since a previous reset and a reset to zero of a counting of the number of electromagnetic pulses.

11. The detection and measurement unit according to claim 1 , wherein the programmable logic circuit is a complex programmable logic circuit, better known under the acronym CPLD.

12. An electromagnetic interference detection system comprising:

a unit for receiving electromagnetic signals configured to receive at least a portion of an electromagnetic radiation to which the detection system is subjected in the form of an electromagnetic wave received in a given frequency band and to supply a digital signal representative of the envelope of said electromagnetic wave,

an detection and measurement unit according to claim 1 .

13. An analysis method for detecting electromagnetic interference carried out using a programmable logic circuit which was previously programmed to act as a detection subunit, the method comprising the steps of:

receiving a digital signal representative of the envelope of an electromagnetic wave received in a given frequency band,

comparing the amplitude of the digital signal representative of the envelope with a first triggering threshold and a second stopping threshold, the second stopping threshold corresponding to an amplitude less than that corresponding to the first triggering threshold,

detecting an electromagnetic pulse on each new double detection of the passage of the amplitude of the digital signal through the first triggering threshold in a rising edge followed by the passage of the amplitude of the digital signal through the second stopping threshold in a falling edge.

14. The analysis method for detecting electromagnetic interference according to claim 13 , further comprising the steps of:

supplying a first clock signal having a first predefined alternating frequency,

modulating the first clock signal with an electromagnetic pulse detection signal supplied during the step of detecting an electromagnetic pulse,

counting the remaining clock signal number after modulation with the electromagnetic pulse detection signal.