IP Library Granted Patent US 11,715,421
Granted Patent B2
US 11,715,421 · App. 17/939,721 · Granted Aug 1, 2023

Pixel and display device including pixel

Inventor: Keunwoo Kim (Seongnam-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233G09G2300/0819G09G2330/021
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Quick Facts
Patent No.
US 11,715,421
App. No.
17/939,721
Granted
Aug 1, 2023
Kind
B2
Abstract

A pixel includes an organic light emitting diode that is configured to output light based on a driving current, and includes a first terminal and a second terminal. A driving transistor is configured to generate the driving current, and includes a first terminal to which a first power supply voltage and a bias power supply voltage are applied, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which a first initialization voltage is applied. The first dual gate transistor is connected between the gate terminal of the driving transistor and the second terminal of the driving transistor. The first switching transistor includes a first terminal to which the bias power supply voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which a light emitting diode initialization signal is applied.

Claims (49)

1. A pixel comprising:

an organic light emitting diode configured to output a light based on a driving current, and including a first terminal and a second terminal;

a driving transistor configured to generate the driving current, and including a first terminal to which a first power supply voltage and a bias power supply voltage are applied, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which a first initialization voltage is applied;

a first dual gate transistor connected between the gate terminal of the driving transistor and the second terminal of the driving transistor, and including a first sub-transistor and a second sub-transistor that are connected in series;

a first switching transistor including a first terminal to which the bias power supply voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which a light emitting diode initialization signal is applied; and

a second switching transistor including a first terminal connected to the second terminal of the first switching transistor, a second terminal connected to a first node that connects the first and second sub-transistors to each other, and a gate terminal to which the first power supply voltage is applied.

2. The pixel of claim 1 , wherein the second switching transistor is configured to reduce a voltage level of the bias power supply voltage to provide a power supply voltage, which has a voltage level that is lower than the voltage level of the bias power supply voltage, to the first node.

3. The pixel of claim 1 , wherein the first switching transistor is configured to provide the bias power supply voltage to the first terminal of the driving transistor in response to the light emitting diode initialization signal, and

the driving transistor to which the bias power supply voltage is applied is in an on-bias state.

4. The pixel of claim 1 , wherein the first dual gate transistor includes a gate terminal to which a compensation gate signal is applied, and wherein

the compensation gate signal is driven at a first frequency,

the light emitting diode initialization signal is driven at a second frequency that is different from the first frequency, and

the second frequency is higher than the first frequency.

5. The pixel of claim 1 , further comprising a third switching transistor including a first terminal to which a second initialization voltage is applied, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which the light emitting diode initialization signal is applied.

6. The pixel of claim 1 , further comprising a fourth switching transistor including a first terminal to which a data voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which a data write gate signal is applied.

7. The pixel of claim 1 , further comprising:

a storage capacitor including a first terminal to which the first power supply voltage is applied, and a second terminal connected to the gate terminal of the driving transistor;

a fifth switching transistor including a first terminal connected to a first power supply voltage line to which the first power supply voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which an emission signal is applied; and

a sixth switching transistor including a first terminal connected to the second terminal of the driving transistor, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which the emission signal is applied.

8. The pixel of claim 7 , wherein the first dual gate transistor includes a gate terminal to which a compensation gate signal is applied, and

the emission signal and the compensation gate signal are driven at a same frequency.

9. The pixel of claim 1 , further comprising a second dual gate transistor connected between the first sub-transistor and an initialization voltage line to which the first initialization voltage is provided, and including a third sub-transistor and a fourth sub-transistor, which are connected in series.

10. The pixel of claim 9 , wherein the second terminal of the second switching transistor is additionally connected to a second node that connects the third and fourth sub-transistors to each other.

11. The pixel of claim 10 , wherein the second switching transistor is configured to reduce a voltage level of the bias power supply voltage to provide a power supply voltage, which has a voltage level that is lower than the voltage level of the bias power supply voltage, to the second node.

12. The pixel of claim 1 , further comprising a seventh switching transistor connected between the first switching transistor and the second switching transistor,

wherein the first power supply voltage is applied to a gate terminal of the seventh switching transistor.

13. The pixel of claim 12 , wherein the second and seventh switching transistors are configured to reduce a voltage level of the bias power supply voltage to provide a power supply voltage, which has a voltage level that is lower than the voltage level of the bias power supply voltage, to the first node.

14. The pixel of claim 1 , wherein the first dual gate transistor diode-connects the driving transistor in response to a compensation gate signal.

15. A display device comprising:

a display panel including a pixel including

an organic light emitting diode configured to output a light based on a driving current, and including a first terminal and a second terminal,

a driving transistor configured to generate the driving current, and including a first terminal to which a first power supply voltage and a bias power supply voltage are applied, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which a first initialization voltage is applied,

a first dual gate transistor connected between the gate terminal of the driving transistor and the second terminal of the driving transistor, and including a first sub-transistor and a second sub-transistor, which are connected in series,

a first switching transistor including a first terminal to which the bias power supply voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which a light emitting diode initialization signal is applied, and

a second switching transistor including a first terminal connected to the second terminal of the first switching transistor, a second terminal connected to a first node that connects the first and second sub-transistors to each other, and a gate terminal to which the first power supply voltage is applied;

a gate driver configured to generate a data write gate signal, a data initialization gate signal, and a compensation gate signal to provide the data write gate signal, the data initialization gate signal, and the compensation gate signal to the pixel, and driven at a first frequency; and

an emission driver configured to generate an emission signal to provide the emission signal to the pixel, and driven at a second frequency that is different from the first frequency.

16. The display device of claim 15 , further comprising an initialization driver configured to generate the light emitting diode initialization signal to provide the light emitting diode initialization signal to the pixel, and driven at the second frequency,

wherein the second frequency is higher than the first frequency.

17. The display device of claim 15 , wherein the pixel further includes:

a third switching transistor including a first terminal to which a second initialization voltage is applied, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which the light emitting diode initialization signal is applied;

a fourth switching transistor including a first terminal to which a data voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which the data write gate signal is applied;

a storage capacitor including a first terminal to which the first power supply voltage is applied, and a second terminal connected to the gate terminal of the driving transistor;

a fifth switching transistor including a first terminal connected to a first power supply voltage line to which the first power supply voltage is applied, a second terminal connected to the first terminal of the driving transistor, and a gate terminal to which the emission signal is applied; and

a sixth switching transistor including a first terminal connected to the second terminal of the driving transistor, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal to which the emission signal is applied.

18. The display device of claim 15 , wherein the pixel further includes a second dual gate transistor connected between the first sub-transistor and an initialization voltage line to which the first initialization voltage is provided, and including a third sub-transistor and a fourth sub-transistor, which are connected in series.

19. The display device of claim 18 , wherein the second terminal of the second switching transistor is additionally connected to a second node that connects the third and fourth sub-transistors to each other.

20. The display device of claim 15 , wherein the pixel further includes a seventh switching transistor connected between the first switching transistor and the second switching transistor, and

the first power supply voltage is applied to a gate terminal of the seventh switching transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2022
From: KIM, KEUNWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 061138/0993 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2022
From: KIM, KEUNWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 061139/0068 →
Priority Claims (1)
KR 10-2021-0132332 · Oct 6, 2021 · national
Continuity (1)
Related Publication 20230103495A1 · Apr 6, 2023
Cited By (1)
US 12,394,358