IP Library › Granted Patent US 11,721,599
Granted Patent B2
US 11,721,599 · App. 17/216,697 · Granted Aug 8, 2023

Semiconductor testkey pattern and test method thereof

Inventors: Linshan Yuan (Fujian, CN); Guang Yang (Fujian, CN); Jinjian Ouyang (Fujian, CN); Jiawei Lyu (Fujian, CN); Chin-Chun Huang (Hsinchu County, TW); Wen Yi Tan (Fujian, CN)
Assignee: United Semiconductor (Xiamen) Co., Ltd.
H01L22/34G01R17/105G01R27/02G01R27/14G01R27/2635G01R31/2831G01R31/2858H01L27/0611
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Quick Facts
Patent No.
US 11,721,599
App. No.
17/216,697
Granted
Aug 8, 2023
Kind
B2
Abstract

The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.

Claims (23)

1. A semiconductor testkey pattern, comprising:

a high density device region; and

a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair comprises two mutually symmetrical resistor patterns, wherein each resistor pattern comprises a plurality of strip-shaped resistor patterns arranged in parallel with each other, and a plurality of wires connect the strip-shaped resistor patterns in series with each other, and wherein the plurality of resistor pairs comprise a plurality of resistor pairs arranged along a first direction, and the remaining part of the testkey pattern comprises a plurality of resistor pairs arranged along a second direction.

2. The semiconductor testkey pattern according to claim 1 , wherein the first direction and the second direction are perpendicular to each other.

3. The semiconductor testkey pattern according to claim 1 , wherein the plurality of resistor pairs arranged along the first direction comprise a plurality of strip-shaped resistor patterns arranged along the first direction, and the plurality of resistor pairs arranged along the second direction comprise a plurality of strip-shaped resistor patterns arranged along the second direction.

4. The semiconductor testkey pattern according to claim 1 , wherein a shortest distance between any one of the plurality of resistor pairs and the high density device region is between 1.5 μm and 50 μm.

5. A method for testing semiconductor testkey patterns, comprising:

providing a semiconductor testkey pattern, the semiconductor testkey pattern comprising:

a high density device region;

a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair comprises two mutually symmetrical resistor patterns, wherein each resistor pattern comprises a plurality of strip-shaped resistor patterns arranged in parallel with each other, and a plurality of wires connect the strip-shaped resistor patterns in series with each other, and wherein the plurality of resistor pairs comprise a plurality of resistor pairs arranged along a first direction, and the remaining part of the testkey pattern comprises a plurality of resistor pairs arranged along a second direction; and

performing a laser heating step on the semiconductor testkey pattern; and

testing the resistance change of each resistor pair of the semiconductor testkey pattern.

6. The test method according to claim 5 , wherein the first direction and the second direction are perpendicular to each other.

7. The test method according to claim 5 , wherein the plurality of resistor pairs arranged along the first direction comprise a plurality of strip-shaped resistor patterns arranged along the first direction, and the plurality of resistor pairs arranged along the second direction comprise a plurality of strip-shaped resistor patterns arranged along the second direction.

8. The test method according to claim 5 , wherein the laser heating step on the semiconductor testkey pattern comprises:

providing a plurality of substrates, wherein each substrate comprises a semiconductor testkey pattern;

performing a laser heating step on the semiconductor testkey pattern of one of the substrates from one angle;

performing a laser heating step on the semiconductor testkey pattern of another substrate from another angle; and

finding out a most suitable angle.

9. The test method according to claim 8 , wherein the laser heating step comprises laser heating the semiconductor testkey pattern from the most suitable angle in a scanning manner.

10. The test method according to claim 5 , wherein testing the resistance change of the semiconductor testkey pattern comprises:

measuring the resistance difference value between the two resistor patterns of each resistor pair after the laser heating step is performed.

11. The test method according to claim 5 , wherein a shortest distance between any one of the plurality of resistor pairs and the high density device region is between 1.5 μm and 50 μm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2021
From: YUAN, LINSHAN; YANG, GUANG; OUYANG, JINJIAN; LYU, JIAWEI; HUANG, CHIN-CHUN; TAN, WEN YI
To: UNITED SEMICONDUCTOR (XIAMEN) CO., LTD.
Reel/Frame 055759/0960 →
Priority Claims (1)
CN 202110234796.7 · Mar 3, 2021 · national
Continuity (1)
Related Publication 20220285235A1 · Sep 8, 2022