Semiconductor device and fabrication method thereof
View Patent ↗The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a channel layer disposed on the substrate, and a barrier layer disposed on the channel layer. The semiconductor device further includes a dielectric layer disposed on the barrier layer and defining a first recess exposing a portion of the barrier layer. The semiconductor device further includes a first spacer disposed within the first recess, wherein the first spacer comprises a surface laterally connecting the dielectric layer to the barrier layer.
1. A nitride semiconductor device, comprising:
a substrate;
a nitride semiconductor channel layer disposed on the substrate;
a nitride semiconductor barrier layer disposed on the channel layer;
a dielectric layer disposed on the nitride semiconductor barrier layer and defining a first recess exposing a portion of the nitride semiconductor barrier layer;
a spacer comprising:
a first dielectric spacer disposed within the first recess; wherein the first dielectric spacer comprises a surface laterally connecting the dielectric layer to the nitride semiconductor barrier layer;
a second dielectric spacer disposed within the first recess, wherein the second dielectric spacer comprises a surface laterally connecting the dielectric layer to the nitride semiconductor barrier layer and wherein the first dielectric spacer and the second dielectric spacer define a second recess, a top portion of the second recess comprises a first length, a bottom portion of the second recess comprises a second length, and the first length is different from the second length;
a third dielectric spacer connected between the first dielectric spacer and the second dielectric spacer; and
a fourth dielectric spacer connected between the first dielectric spacer and the second dielectric spacer and separated from the third dielectric spacer, wherein the first dielectric spacer, the second dielectric spacer, the third dielectric spacer, and the fourth dielectric spacer surround peripherals of the portion of the nitride semiconductor barrier layer; and
a gate disposed on the dielectric layer, the first dielectric spacer and the second dielectric spacer, wherein a portion of the gate is in contact with the nitride semiconductor barrier layer.
2. The nitride semiconductor device according to claim 1 , wherein the first dielectric spacer and the second dielectric spacer define a tapered recess from a cross sectional view perspective.
3. The nitride semiconductor device according to claim 1 , wherein the first length is larger than the second length.
4. The nitride semiconductor device according to claim 1 , wherein the dimension of the second recess decreases gradually from the top portion of the second recess toward the bottom portion of the second recess.
5. The nitride semiconductor device according to claim 1 , wherein the gate comprises a first curved surface and a second curved surface, and the first curved surface and the second curved surface define a recess.
6. The nitride semiconductor device according to claim 1 , wherein a first interface exists between the first dielectric spacer and the nitride semiconductor barrier layer, a second interface exists between the gate and the nitride semiconductor barrier layer, and the first interface is not coplanar with the second interface.
7. The nitride semiconductor device according to claim 1 , wherein the nitride semiconductor barrier layer comprises a recess between the first dielectric spacer and the second dielectric spacer, and the recess of the nitride semiconductor barrier layer comprises an inclined surface adjacent to the first dielectric spacer.
8. The nitride semiconductor device according to claim 7 , wherein the inclined surface is not coplanar with a first interface existing between the first dielectric spacer and the nitride semiconductor barrier layer.
9. The nitride semiconductor device according to claim 7 , wherein the recess of the nitride semiconductor barrier layer further comprises a horizontal surface connected to the inclined surface, and the horizontal surface is not coplanar with a first interface existing between the first dielectric spacer and the nitride semiconductor barrier layer.
10. The nitride semiconductor device according to claim 1 , wherein the first dielectric spacer includes a first protection layer, wherein the first protection layer is in contact with the dielectric layer and the nitride semiconductor barrier layer.
11. The nitride semiconductor device according to claim 1 , wherein the first dielectric spacer includes a first protection layer disposed such that it contacts the dielectric layer and the nitride semiconductor barrier layer.