Pixel and display device
A pixel includes: a capacitor connected between a first voltage line and a first node; a light emitting diode including a first electrode connected to a second node, and a second electrode connected to a second voltage line; a first transistor; a second transistor; a third transistor including a first electrode connected to the first node, a second electrode connected to the second node, and a gate electrode to receive a first scan signal; a fourth transistor including a first electrode connected to the first node, a second electrode connected to a third voltage line to receive a third voltage, and a gate electrode to receive a second scan signal; and a compensation transistor including a first electrode connected to the first node, a second electrode connected to a fourth voltage line to receive a compensation voltage, and a gate electrode to receive a compensation control voltage.
1. A pixel comprising:
a capacitor electrically connected between a first voltage line and a first node, the first voltage line being configured to receive a first voltage;
a light emitting diode comprising a first electrode electrically connected to a second node, and a second electrode electrically connected to a second voltage line;
a first transistor comprising a first electrode electrically connected to the first voltage line, a second electrode connected to the second node, and a gate electrode electrically connected to the first node;
a second transistor comprising a first electrode connected to a data line, a second electrode electrically connected to the first electrode of the first transistor, and a gate electrode configured to receive a first scan signal;
a third transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to the second node, and a gate electrode configured to receive the first scan signal;
a fourth transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to a third voltage line configured to receive a third voltage, and a gate electrode configured to receive a second scan signal; and
a compensation transistor different from the third transistor and forming a current path between the first node and a fourth voltage line configured to receive a compensation voltage, the compensation transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to the fourth voltage line, and a gate electrode configured to receive a compensation control voltage.
2. The pixel of claim 1 , further comprising:
a fifth transistor connected between the first voltage line and the first electrode of the first transistor;
a sixth transistor connected between the second node and the first electrode of the light emitting diode; and
a seventh transistor connected between the third voltage line and the first electrode of the light emitting diode, and comprising a gate electrode configured to receive a third scan signal.
3. The pixel of claim 1 , wherein the compensation voltage has a voltage level to compensate for a leakage current of the third transistor and a leakage current of the fourth transistor.
4. The pixel of claim 1 , wherein the compensation control voltage has a voltage level configured to maintain the compensation transistor in a turned-off state.
5. The pixel of claim 1 , wherein each of the third transistor, the fourth transistor, and the compensation transistor comprises a P-type transistor.
6. The pixel of claim 1 , wherein the third transistor comprises:
a first sub-transistor comprising a first electrode connected to the first node, a second electrode, and a gate electrode configured to receive the first scan signal; and
a second sub-transistor comprising a first electrode connected to the second electrode of the first sub-transistor, a second electrode connected to the second node, and a gate electrode configured to receive the first scan signal.
7. The pixel of claim 1 , wherein the fourth transistor comprises:
a first sub-transistor comprising a first electrode connected to the first node, a second electrode, and a gate electrode configured to receive the second scan signal; and
a second sub-transistor comprising a first electrode connected to the second electrode of the first sub-transistor, a second electrode connected to the third voltage line, and a gate electrode configured to receive the second scan signal.
8. A pixel comprising:
a capacitor electrically connected between a first voltage line and a first node, the first voltage line being configured to receive a first voltage;
a light emitting diode comprising a first electrode electrically connected to a second node, and a second electrode electrically connected to a second voltage line;
a first transistor comprising a first electrode electrically connected to the first voltage line, a second electrode connected to the second node, and a gate electrode electrically connected to the first node;
a second transistor comprising a first electrode connected to a data line, a second electrode electrically connected to the first electrode of the first transistor, and a gate electrode configured to receive a first scan signal;
a third transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to the second node, and a gate electrode configured to receive the first scan signal;
a fourth transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to a third voltage line configured to receive a third voltage, and a gate electrode configured to receive a second scan signal; and
a compensation transistor different from the third transistor and configured to transfer a leakage current from the second node to a fourth voltage line configured to receive a compensation voltage, the compensation transistor comprising a first electrode electrically connected to the second node, a second electrode electrically connected to the fourth voltage line, and a gate electrode configured to receive a compensation control voltage.
9. The pixel of claim 8 , further comprising:
a fifth transistor connected between the first voltage line and the first electrode of the first transistor;
a sixth transistor connected between the second node and the first electrode of the light emitting diode; and
a seventh transistor connected between the third voltage line and the first electrode of the light emitting diode, and comprising a gate electrode configured to receive a third scan signal.
10. The pixel of claim 8 , wherein the compensation voltage has a voltage level to compensate for a leakage current of the third transistor and a leakage current of the fourth transistor.
11. The pixel of claim 8 , wherein the compensation control voltage has a voltage level configured to maintain the compensation transistor in a turned-off state.
12. The pixel of claim 8 , wherein each of the third transistor, the fourth transistor, and the compensation transistor comprises a P-type transistor.
13. The pixel of claim 8 , wherein the third transistor comprises:
a first sub-transistor comprising a first electrode connected to the first node, a second electrode, and a gate electrode configured to receive the first scan signal; and
a second sub-transistor comprising a first electrode connected to the second electrode of the first sub-transistor, a second electrode connected to the second node, and a gate electrode configured to receive the first scan signal.
14. The pixel of claim 8 , wherein the fourth transistor comprises:
a first sub-transistor comprising a first electrode connected to the first node, a second electrode, and a gate electrode configured to receive the second scan signal; and
a second sub-transistor comprising a first electrode connected to the second electrode of the first sub-transistor, a second electrode connected to the third voltage line, and a gate electrode configured to receive the second scan signal.
15. A display device comprising:
a pixel; and
a scan driving circuit configured to output a first scan signal and a second scan signal for driving the pixel,
wherein the pixel comprises:
a capacitor electrically connected between a first voltage line and a first node, the first voltage line being configured to receive a first voltage;
a light emitting diode comprising a first electrode electrically connected to a second node, and a second electrode electrically connected to a second voltage line configured to receive a second voltage;
a first transistor comprising a first electrode electrically connected to the first voltage line, a second electrode connected to the second node, and a gate electrode electrically connected to the first node;
a second transistor comprising a first electrode connected to a data line, a second electrode electrically connected to the first electrode of the first transistor, and a gate electrode configured to receive the first scan signal;
a third transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to the second node, and a gate electrode configured to receive the first scan signal;
a fourth transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to a third voltage line configured to receive a third voltage, and a gate electrode configured to receive the second scan signal; and
a compensation transistor different from the third transistor and forming a current path between the first node and a fourth voltage line to transfer a leakage current to the fourth voltage line, the compensation transistor comprising a first electrode electrically connected to the first node, a second electrode electrically connected to the fourth voltage line configured to receive a compensation voltage, and a gate electrode configured to receive a compensation control voltage.
16. The display device of claim 15 , further comprising:
a fifth transistor connected between the first voltage line and the first electrode of the first transistor;
a sixth transistor connected between the second node and the first electrode of the light emitting diode; and
a seventh transistor connected between the third voltage line and the first electrode of the light emitting diode, and comprising a gate electrode configured to receive a third scan signal.
17. The display device of claim 15 , further comprising:
a voltage generator configured to generate the first voltage, the second voltage, the third voltage, the compensation voltage, and the compensation control voltage.
18. The display device of claim 17 , wherein the voltage generator is configured to control a voltage level of the compensation voltage to correspond to a difference between a leakage current of the third transistor and a leakage current of the fourth transistor.
19. The display device of claim 17 , wherein the voltage generator is configured to control a voltage level of the compensation control voltage to maintain the compensation transistor in a turned-off state.
20. The display device of claim 15 , wherein each of the third transistor, the fourth transistor, and the compensation transistor comprises a P-type transistor.