Physically unclonable function (PUF) generation involving programming of marginal bits
Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.
1. A method for operating a circuit, comprising:
applying a voltage below a program voltage to a set of never-programmed resistive switching devices of an array of resistive switching memory devices of the circuit;
reading an associated native current for each resistive switching device of the set of never-programmed resistive switching devices relative to a low threshold current value and to a high threshold current value;
determining a first group of switching devices having a first digital value in response to having native current above the high threshold current value, and a second group of switching devices having a second digital value in response to having native current below the low threshold current value, wherein the first digital value is different from the second digital value; and
applying a program voltage to a third group of switching devices to cause the third group of switching devices to become programmed non-volatile resistive switching devices, wherein the third group of switching devices have native current above the low threshold current value and below the high threshold current value.
2. The method of claim 1 , further comprising:
reading an associated current from each resistive switching device of a subset of the set;
determine, based on the associated current of each resistive switching device of the subset, whether that resistive switching device belongs to the first group, the second group, or the third group; and
constructing a sequence based on the digital values determined for resistive switching devices of the subset, wherein each resistive switching device of the third group is ignored in constructing the sequence.
3. The method of claim 2 , wherein the first digital value is ‘0’ and the second digital value is ‘1’.
4. The method of claim 2 , wherein reading the associated current from each resistive switching device of the subset comprises reading relative to a single sensing current at the mean native current.
5. The method of claim 2 , wherein reading the associated current from each resistive switching device of the second subset comprises reading relative to a first sensing current at the mean native current and relative to a second sensing current between the associated native currents of the set and the associated programmed currents of the set.
6. The method of claim 5 , wherein the third group are programmed between 35 μA and 45 μA and the second sensing current is between 5 μA and 25 μA.
7. The method of claim 2 , wherein the sequence is constructed according to an order of the resistive switching devices in an array on the semiconductor die.
8. The method of claim 1 , wherein reading the associated native current for each resistive switching device of the set comprises:
reading the associated native current for each resistive switching device of the set relative to the low threshold; and
reading the associated native current for each resistive switching device of the set relative to the high threshold.
9. The method of claim 1 , wherein the low threshold is within ±10% of a standard deviation below the mean native current and the high threshold is within +10% of the standard deviation above the mean native current.
10. The method of claim 1 , wherein the set is selected from among resistive switching devices allocated for identifier memory.
11. The method of claim 10 , wherein the resistive switching devices allocated for identifier memory have associated switching layers with a thickness of at least 20 angstroms.
12. A method of operating a semiconductor device comprising resistive switching devices, comprising:
enabling an identifier acquisition sequence for a semiconductor chip;
identifying a set of never-programmed resistive switching devices on the semiconductor chip for the identifier acquisition process;
applying a voltage below a program voltage to the set of never-programmed resistive switching devices of an array of resistive switching memory devices of the circuit;
reading an associated native current for each resistive switching device of the set of never-programmed resistive switching devices relative to a low threshold current value and to a high threshold current value;
determining a first group of switching devices having a first digital value in response to having native current above the high threshold current value, and a second group of switching devices having a second digital value in response to having native current below the low threshold current value, wherein the first digital value is different from the second digital value;
applying a program voltage to a third group of switching devices to cause the third group of switching devices to become programmed non-volatile resistive switching devices, wherein the third group of switching devices have native current above the low threshold current value and below the high threshold current value;
reading an associated current from each resistive switching device of a subset of the set;
determine, based on the associated current of each resistive switching device of the subset, whether that resistive switching device belongs to the first group, the second group, or the third group; and
constructing a sequence based on the digital values determined for resistive switching devices of the subset, wherein each resistive switching device of the third group is ignored in constructing the sequence.
13. The method of claim 12 , wherein the first digital value is ‘0’ and the second digital value is ‘1’.
14. The method of claim 12 , wherein reading the associated current from each resistive switching device of a second subset of the set comprises reading relative to a single sensing current at the mean native current.
15. The method of claim 12 , wherein reading the associated current from each resistive switching device of the second subset comprises reading relative to a first sensing current at the mean native current and relative to a second sensing current between the associated native currents of the set and the associated programmed currents of the set.
16. The method of claim 15 , wherein the third group are programmed between 35 μA and 45 μA and the second sensing current is between 5 μA and 25 μA.
17. The method of claim 12 , wherein the sequence is constructed according to an order of the resistive switching devices in an array on the semiconductor die.
18. The method of claim 12 , wherein reading the associated native current for each resistive switching device of the set comprises:
reading the associated native current for each resistive switching device of the set relative to the low threshold; and
reading the associated native current for each resistive switching device of the set relative to the high threshold.
19. The method of claim 11 , wherein the low threshold is within +10% of a standard deviation below the mean native current and the high threshold is within ±10% of the standard deviation above the mean native current.
20. The method of claim 11 , wherein the set is selected from among resistive switching devices allocated for identifier memory.