IP Library › Granted Patent US 11,728,304
Granted Patent B2
US 11,728,304 · App. 17/240,641 · Granted Aug 15, 2023

Nonvolatile memory device, system including the same and method of fabricating the same

Inventors: Jae Ho Ahn (Seoul, KR); Ji Won Kim (Seoul, KR); Sung-Min Hwang (Hwaseong-si, KR); Joon-Sung Lim (Seongnam-si, KR); Suk Kang Sung (Seongnam-si, KR)
H01L24/08H01L21/76805H01L21/76895H01L23/535H01L25/0657H01L25/18H10B41/27H10B43/27H01L2224/08145H01L2924/1431H01L2924/14511
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Quick Facts
Patent No.
US 11,728,304
App. No.
17/240,641
Granted
Aug 15, 2023
Kind
B2
Abstract

A nonvolatile memory device including a substrate extending in a first direction, a ground selection line extending in the first direction on the substrate, a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction, a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction, a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction, a front contact plug connected to an upper face of the landing pad opposite the lower face and extending in the second direction, an input/output pad electrically connected to the rear contact plug, and an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

Claims (53)

1. A nonvolatile memory device comprising:

a substrate extending in a first direction;

a ground selection line extending in the first direction on the substrate;

a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction;

a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction;

a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate;

a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction;

an input/output pad connected to the rear contact plug; and

an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

2. The nonvolatile memory device of claim 1 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

3. The nonvolatile memory device of claim 2 , wherein the front contact face overlaps the rear contact face when viewed in the second direction.

4. The nonvolatile memory device of claim 1 , wherein a rear contact face at which the landing pad and the rear contact plug converge does not overlap a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

5. The nonvolatile memory device of claim 1 , wherein a first length of the upper bonding pad in the first direction is smaller than a second length of the landing pad in the first direction.

6. The nonvolatile memory device of claim 1 , wherein the landing pad includes at least four landing pads formed sequentially in the second direction.

7. The nonvolatile memory device of claim 1 , wherein the landing pad is disposed at a same height as the ground selection line.

8. The nonvolatile memory device of claim 1 , wherein the landing pad is disposed at a same height as at least one of the plurality of word lines.

9. The nonvolatile memory device of claim 1 , wherein the landing pad includes at least four landing pads spaced apart from each other in the first direction.

10. A nonvolatile memory device comprising:

a peripheral region including a plurality of circuit elements; and

a cell region which is electrically connected to the plurality of circuit elements and that stores data,

wherein the cell region comprises

a substrate extending in a first direction,

a ground selection line extending in the first direction on the substrate,

a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction,

a channel structure penetrating the ground selection line and the plurality of word lines, and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate,

a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction,

a rear contact plug connected to a lower face of the landing pad and extending in the second direction intersecting the first direction,

a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction,

an input/output pad electrically connected to the rear contact plug; and

an upper bonding pad electrically connected to the front contact plug and connected to at least a part of the plurality of circuit elements of the nonvolatile memory device.

11. The nonvolatile memory device of claim 10 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

12. The nonvolatile memory device of claim 11 , wherein the front contact face overlaps the rear contact face when viewed in the second direction.

13. The nonvolatile memory device of claim 10 , wherein a rear contact face at which the landing pad and the rear contact plug converge does not overlap a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

14. The nonvolatile memory device of claim 10 , wherein a first length of the upper bonding pad in the first direction is smaller than a second length of the landing pad in the first direction.

15. The nonvolatile memory device of claim 10 , wherein the landing pad includes at least four landing pads formed sequentially in the second direction.

16. The nonvolatile memory device of claim 10 , wherein the landing pad is disposed at a same height as the ground selection line.

17. The nonvolatile memory device of claim 10 , wherein the landing pad is disposed at a same height as at least one of the plurality of word lines.

18. The nonvolatile memory device of claim 10 , wherein the landing pad includes at least four landing pads spaced apart from each other in the first direction.

19. A nonvolatile memory system comprising:

a main board;

a nonvolatile memory device on the main board; and

a controller electrically connected to the nonvolatile memory device on the main board,

wherein the nonvolatile memory device comprises

a substrate extending in a first direction,

a ground selection line extending in the first direction on the substrate,

a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction,

a channel structure penetrating the ground selection line and the plurality of word lines and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate, the channel structure storing data,

a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction,

a rear contact plug connected to a lower face of the landing pad and extending in the second direction intersecting the first direction,

a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction,

an input/output pad electrically connected to the rear contact plug, and

an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

20. The nonvolatile memory system of claim 19 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2021
From: AHN, JAE HO; KIM, JI WON; HWANG, SUNG-MIN; LIM, JOON-SUNG; SUNG, SUK KANG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 056043/0197 →
Priority Claims (1)
KR 10-2020-0125854 · Sep 28, 2020 · national
Continuity (1)
Related Publication 20220102306A1 · Mar 31, 2022