IP Library Granted Patent US 11,735,430
Granted Patent B2
US 11,735,430 · App. 17/206,740 · Granted Aug 22, 2023

Fin field-effect transistor device and method

Inventors: Yin Wang (New Taipei, TW); Hung-Ju Chou (Taipei, TW); Jiun-Ming Kuo (Taipei, TW); Wei-Ken Lin (Tainan, TW); Chun Te Li (Renwu Township, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L21/3105H01L21/0217H01L21/02164H01L21/02211H01L21/02247H01L21/02252H01L21/02323H01L21/02337H01L21/31051H01L21/762H01L21/76224H01L21/823821H01L21/823828H01L21/823878H01L29/0649H01L29/0847H01L29/66545H01L29/7851H01L29/7853H01L21/31053H01L21/823842
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Quick Facts
Patent No.
US 11,735,430
App. No.
17/206,740
Granted
Aug 22, 2023
Kind
B2
Abstract

A method includes forming a semiconductor capping layer over a first fin in a first region of a substrate, forming a dielectric layer over the semiconductor capping layer, and forming an insulation material over the dielectric layer, an upper surface of the insulation material extending further away from the substrate than an upper surface of the first fin. The method further incudes recessing the insulation material to expose a top portion of the first fin, and forming a gate structure over the top portion of the first fin.

Claims (53)

1. A method of forming Fin Field-Effect Transistor (FinFET) device, the method comprising:

forming a capping layer over a fin that protrudes above a substrate;

forming a first dielectric layer over the capping layer;

forming an insulation material over the first dielectric layer, wherein the insulation material extends further away from the substrate than the fin;

annealing the insulation material, wherein the annealing converts an upper layer of the first dielectric layer into a second dielectric layer different from the first dielectric layer;

recessing the insulation material to expose a top portion of the fin; and

forming a gate structure over the top portion of the fin.

2. The method of claim 1 , wherein forming the capping layer comprises forming a silicon capping layer over the fin.

3. The method of claim 2 , further comprising, after forming the capping layer and before forming the first dielectric layer, treating the capping layer with a nitride-containing gas.

4. The method of claim 1 , wherein the second dielectric layer is an oxide of the first dielectric layer.

5. The method of claim 4 , wherein after the annealing, the second dielectric layer and remaining portions of the first dielectric layer form a dielectric liner stack, wherein an atomic percentage of oxygen in the dielectric liner stack is non-uniform.

6. The method of claim 5 , wherein the atomic percentage of oxygen in the dielectric liner stack has a gradient along a direction perpendicular to a major upper surface of the substrate.

7. The method of claim 4 , wherein the first dielectric layer is formed of silicon nitride, and the second dielectric layer is formed of silicon oxynitride.

8. The method of claim 1 , wherein annealing the insulation material comprises:

performing a first anneal process;

after the first anneal process, performing a planarization process to expose the second dielectric layer; and

performing a second anneal process after the planarization process.

9. The method of claim 8 , wherein performing the first anneal process comprises:

performing a first wet steam anneal; and

performing a first dry anneal after the first wet steam anneal.

10. The method of claim 9 , wherein performing the second anneal process comprises:

performing a second wet steam anneal; and

performing a second dry anneal after the second wet steam anneal.

11. The method of claim 10 , wherein the first wet steam anneal and the second wet steam anneal are performed using water steam, and wherein the first dry anneal and the second dry anneal are performed using nitrogen gas.

12. The method of claim 1 , wherein after annealing the insulation material, a remaining lower layer of the first dielectric layer has a first thickness, and the second dielectric layer has a second thickness, wherein the first thickness is larger than the second thickness.

13. A method of forming Fin Field-Effect Transistor (FinFET) device, the method comprising:

forming a first fin in a PMOS region of a substrate;

forming a second fin in an NMOS region of the substrate adjacent to the PMOS region;

forming a capping layer over the first fin and the second fin;

forming a first dielectric material over the capping layer;

depositing a second dielectric material between and over the first fin and the second fin, wherein the first dielectric material is formed between the capping layer and the second dielectric material;

curing the second dielectric material, wherein the curing oxidizes an exterior layer of the first dielectric material into a third dielectric material different from the first dielectric material;

recessing the second dielectric material after the curing to expose a top portion of the first fin and a top portion of the second fin; and

forming a first gate structure over the first fin and forming a second gate structure over the second fin.

14. The method of claim 13 , wherein the first dielectric material is silicon nitride, and the third dielectric material is silicon oxynitride.

15. The method of claim 14 , wherein the curing comprising:

performing a wet anneal process using water steam; and

after the wet anneal process, performing a dry anneal process in an ambient comprising nitrogen gas.

16. The method of claim 13 , wherein after the curing, the third dielectric material and remaining portions of the first dielectric material form a dielectric liner stack, wherein an atomic percentage of oxygen in the dielectric liner stack decreases along a vertical direction from a top surface of the first fin toward the substrate.

17. The method of claim 13 , wherein the first fin and the second fin are formed of different semiconductor materials.

18. A method of forming a Fin Field-Effect Transistor (FinFET) device, the method comprising:

forming a fin protruding above a substrate;

forming a capping layer over the fin;

forming a first dielectric layer over the capping layer;

forming an insulation material over the substrate and around the fin, the insulation material covering the first dielectric layer; and

curing the insulation material, wherein the curing comprises:

performing a first curing process to cure at least top portions of the insulation material;

after the first curing process, removing the top portions of the insulation material to expose the first dielectric layer; and

after removing the top portions of the insulation material, performing a second curing process to cure bottom portions of the insulation material, wherein after the second curing process, an upper layer of the first dielectric layer distal from the fin is converted into a second dielectric layer different from the first dielectric layer.

19. The method of claim 18 , wherein the second dielectric layer is an oxide of the first dielectric layer.

20. The method of claim 18 , further comprising:

after curing the insulation material, recessing the insulation material such that the fin protrudes above the insulation material; and

forming a gate structure over the fin.

Continuity (4)
Continuation 16569815 · Sep 13, 2019
Division 15801194 · Nov 1, 2017
Provisional Application 62552986 · Aug 31, 2017
Related Publication 20210210354A1 · Jul 8, 2021