Semiconductor structure, back-side illuminated image sensor and method for manufacturing the same
A semiconductor structure includes: a semiconductor substrate arranged over a back end of line (BEOL) metallization stack, and including a scribe line opening; a conductive pad having an upper surface that is substantially flush with an upper surface of the semiconductor substrate, the conductive pad including an upper conductive region and a lower conductive region, the upper conductive region being confined to the scribe line opening substantially from the upper surface of the semiconductor substrate to a bottom of the scribe line opening, and the lower conductive region protruding downward from the upper conductive region, through the BEOL metallization stack; a passivation layer arranged over the semiconductor substrate; and an array of pixel sensors arranged in the semiconductor substrate adjacent to the conductive pad.
1. A method for manufacturing a semiconductor structure, comprising:
performing a first etch upon a semiconductor substrate to form a scribe line opening;
performing a second etch in the scribe line opening to form a pad opening, wherein the pad opening includes an upper region and a lower region, the upper region being confined to the scribe line opening substantially from an upper surface of the semiconductor substrate to a bottom of the scribe line opening, and the lower region protruding downward from the upper region, through an isolation region; and
filling the pad opening with a conductive material.
2. The method of claim 1 , further comprising: forming an array of pixel sensors.
3. The method of claim 2 , wherein the scribe line opening extends laterally around the array of pixel sensors.
4. The method of claim 1 , further comprising: depositing a buffer layer lines sidewalls of the scribe line opening.
5. The method of claim 1 , wherein the isolation region extends into the semiconductor substrate.
6. The method of claim 1 , further comprising: forming a passivation layer over the semiconductor substrate.
7. The method of claim 4 , wherein the deposition of the buffer layer further comprises: depositing the buffer layer to line the upper surface of the semiconductor substrate and the bottom of the scribe line opening.
8. The method of claim 1 , wherein a width of the upper region of the pad opening is greater than a width of the lower region of the pad opening.
9. A method for manufacturing a semiconductor structure, comprising:
performing a first etch upon a top surface of a semiconductor substrate to form a scribe line opening, wherein an isolation region is embedded in the semiconductor substrate and neighboring to a bottom surface of the semiconductor substrate, and a portion of the semiconductor substrate and a portion of the isolation region are etched by the first etch, thereby exposing the isolation region;
depositing a buffer layer lining the top surface of the semiconductor substrate and the scribe line opening;
performing a second etch in the scribe line opening to etch through the semiconductor structure, the buffer layer, and the isolation region; and
filling the pad opening with a conductive material.
10. The method of claim 9 , wherein the performing the second etch comprises:
performing the second etch in the scribe line opening through a select region to further etch through a portion of a back end of line (BEOL) metallization stack to form a pad opening.
11. The method of claim 10 , wherein a width of the select region is narrower than a width of the scribe line opening.
12. The method of claim 11 , wherein the select region is centered on a center of the scribe line opening.
13. The method of claim 9 , further comprising: forming a passivation layer over the semiconductor substrate.
14. The method of claim 9 , wherein the deposition of the buffer layer comprises:
depositing the buffer layer to line sidewalls and a bottom of the scribe line opening.
15. The method of claim 13 , wherein the passivation includes silicon nitride.
16. The method of claim 9 , wherein the filling the pad opening with the conductive material comprises:
conformally forming a barrier layer over sidewalls and a bottom of the pad opening.
17. The method of claim 16 , wherein the filling the pad opening with the conductive material further comprises:
filling the pad opening with copper.
18. A method for manufacturing a semiconductor structure, comprising:
performing a first etch upon a semiconductor substrate to form a scribe line opening;
forming a buffer layer over the semiconductor substrate and lining the scribe line opening;
performing a second etch upon the buffer layer, an isolation region, and a back end of line (BEOL) metallization stack to form a pad opening; and
filling the pad opening with a conductive material.
19. The method of claim 18 , wherein the performing the second etch upon the buffer layer, the isolation region, and the BEOL metallization stack to form the pad opening comprises:
performing the second etch upon the buffer layer, the isolation region, and the BEOL metallization stack to form the pad opening through a select region, the select region extending along the scribe line opening, the select region has a width narrower than that of the scribe line opening.
20. The method of claim 19 , wherein the select region is centered on a center of the scribe line opening.