Quantum error correction
Apparatus for quantum error correction is disclosed. The apparatus includes an array of processing cores, each processing core comprising: a processor on a first chip; and a processor cache on the first chip; and a bus for interconnecting neighbouring processing cores in the array of processing cores; wherein each processing core includes: control code which, when executed by the processor, causes the processor to access a processor cache of at least one neighbouring processing core.
1. A computer-implemented method comprising:
receiving, by a classical processing layer comprising an array of processing cores, measurement data from a quantum computing layer, wherein each processing core in the array of processing cores receives measurement data from a local patch of quantum devices in the quantum computing layer;
identifying, by the classical processing layer, a plurality of detection events in the measurement data;
matching, by the classical processing layer, a detection event to another detection event to form a matched pair, the matching comprising
i) attempting, by a processor core associated with the local patch containing the detection event, to match the detection event to a detection event in the same local patch, and
ii) if the processor core is unable to match a detection event to another detection event in the same local patch, accessing a processor cache of a neighbouring processor core and attempting to match the detection event to a detection event in a neighbouring local patch corresponding to the neighbouring processor core; and
determining one or more errors in the quantum computing algorithm performed by the quantum computing layer using the matched pair.
2. The method of claim 1 , further comprising:
receiving, by a control layer comprising an array of field programmable gated arrays, physical measurements from the quantum computing layer;
converting, by the control layer, the physical measurements to measurement data; and
outputting, by the control layer, the measurement data to the classical processing layer.
3. The method of claim 2 , further comprising:
receiving, by the control layer, quantum error correction instructions; and
in response to receiving the quantum error correction instructions, causing, by the control layer, implementation of one or more qubit rotations on the quantum computing layer.
4. The method of claim 1 , further comprising determining, by the classical processing layer, corrected parities of quantum devices in the quantum computing layer.
5. The method of claim 4 , further comprising:
receiving, by a second classical processing layer, one or more corrected parities of quantum devices in the quantum computing layer from the classical processing layer; and
determining, by the second classical processing layer, one or more quantum error correction instructions from one or more determined errors corrected parities.
6. The method of claim 5 , further comprising causing, by the second classical processing layer, implementations of the one or more quantum error correction instructions in the quantum computing layer.
7. The method of claim 5 , further comprising implementing, by the second classical processing layer, a surface code to determine the one or more quantum error correction instructions.