IP Library › Granted Patent US 11,741,909
Granted Patent B2
US 11,741,909 · App. 17/851,440 · Granted Aug 29, 2023

Pixel circuit and driving method therefor, and display substrate and display device

Inventor: Zhichong Wang (Beijing, CN)
Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
G09G3/3275G09G2320/0257G09G2330/02
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,741,909
App. No.
17/851,440
Granted
Aug 29, 2023
Kind
B2
Abstract

A pixel circuit and a driving method therefor, and a display substrate and a display device are disclosed. The pixel circuit includes a compensation circuit. The compensation circuit may output an initial power supply signal to a first node, and a driving circuit may drive a light-emitting element to emit light according to a potential of the first node and a second power supply signal provided by a second power supply end. And, each driving circuit which the display panel includes may start to work from the same bias situation and drive the corresponding light-emitting element to emit light.

Claims (29)

1. A pixel circuit, comprising: a light-emitting control circuit, a compensation circuit and a driving circuit; wherein

the light-emitting control circuit is respectively coupled with a first gate signal end, a data signal end, a light-emitting control signal end, a first power supply end, a first node, a second node and a light-emitting element, and the light-emitting control circuit is used to control a potential of the first node, and control switching-on and switching-off between the second node and the light-emitting element in response to a first gate driving signal from the first gate signal end, a data signal from the data signal end, a light-emitting control signal from the light-emitting control signal end and a first power supply signal from the first power supply end;

the compensation circuit is respectively coupled with the first gate signal end, a second gate signal end, an initial power supply end, the first node and the second node, and the compensation circuit is used to output an initial power supply signal provided by the initial power supply end in response to the first gate driving signal and a second gate driving signal from the second gate signal end, and adjust the potential of the first node according to a potential of the second node in response to the first gate driving signal;

the compensation circuit comprises: a first compensation sub-circuit and a second compensation sub-circuit; the first compensation sub-circuit is respectively coupled with the second gate signal end, the initial power supply end, and the first compensation sub-circuit is used to output the initial power supply signal in response to the second gate driving signal; and

the driving circuit is respectively coupled with the first node, a second power supply end and the second node, and the driving circuit is used to output a driving signal to the second node in response to the potential of the first node and a second power supply signal from the second power supply end,

wherein the second compensation sub-circuit is respectively coupled with the first gate signal end and the first node, the second compensation sub-circuit comprises: a third compensation transistor; a gate of the third compensation transistor is coupled with the first gate signal end, a first electrode of the third compensation transistor is coupled with the second node, and a second electrode of the third compensation transistor is coupled with the first node.

2. The circuit according to claim 1 , wherein the first compensation sub-circuit comprises: a first compensation transistor; wherein

a gate of the first compensation transistor is coupled with the second gate signal end, a first electrode of the first transistor is coupled with the initial power supply end, and a second electrode of the first compensation transistor is coupled with the first node.

3. The circuit according to claim 1 , wherein the driving circuit comprises: a driving transistor; wherein

a gate of the driving transistor is coupled with the first node, a first electrode of the driving transistor is coupled with the second power supply end, and a second electrode of the driving transistor is coupled with the second node.

4. The circuit according to claim 1 , wherein the light-emitting control circuit comprises: a data writing sub-circuit, a light-emitting control sub-circuit and a storage sub-circuit; wherein

the data writing sub-circuit is respectively coupled with the data signal end and a fourth node, and the data writing sub-circuit is used to output the data signal to the fourth node;

the light-emitting control sub-circuit is respectively coupled with the light-emitting control signal end, the first power supply end, the second node and the light-emitting element, and the light-emitting control sub-circuit is used to control switching-on and switching-off between the second node and the light-emitting element; and

the storage sub-circuit is respectively coupled with the fourth node and the first node, and the storage sub-circuit is used to adjust the potential of the first node according to a potential of the fourth node.

5. The circuit according to claim 4 , wherein the data writing sub-circuit comprises: a data writing transistor; wherein

a first electrode of the data writing transistor is coupled with the data signal end, and a second electrode of the data writing transistor is coupled with the fourth node.

6. The circuit according to claim 4 , wherein the light-emitting control sub-circuit comprises: a second light-emitting control transistor; wherein

a gate of the second light-emitting control transistor is coupled with the light-emitting control signal end, a first electrode of the second light-emitting control transistor is coupled with the second node, and a second electrode of the second light-emitting control transistor is coupled with the light-emitting element.

7. The circuit according to claim 6 , wherein all transistors which the pixel circuit comprise are P-type transistors.

8. The circuit according to claim 4 , wherein the storage sub-circuit comprises: a storage capacitor; wherein

one end of the storage capacitor is coupled with the fourth node, and the other end of the storage capacitor is coupled with the first node.

9. The circuit according to claim 1 , wherein the first power supply end and the second power supply end are light-emitting direct-current power supply ends.

10. A display substrate, comprising: a plurality of pixel units, wherein among the plurality of pixel units, at least one pixel unit comprises: a light-emitting element and a pixel circuit coupled with the light-emitting element, wherein the pixel circuit comprises: a light-emitting control circuit, a compensation circuit and a driving circuit; wherein

the light-emitting control circuit is respectively coupled with a first gate signal end, a data signal end, a light-emitting control signal end, a first power supply end, a first node, a second node and a light-emitting element, and the light-emitting control circuit is used to control a potential of the first node, and control switching-on and switching-off between the second node and the light-emitting element in response to a first gate driving signal from the first gate signal end, a data signal from the data signal end, a light-emitting control signal from the light-emitting control signal end and a first power supply signal from the first power supply end;

the compensation circuit is respectively coupled with the first gate signal end, a second gate signal end, a third gate signal end, an initial power supply end, the first node and the second node, and the compensation circuit is used to output an initial power supply signal provided by the initial power supply end in response to the first gate driving signal and a second gate driving signal from the second gate signal end, and adjust the potential of the first node according to a potential of the second node in response to the first gate driving signal and a third gate driving signal from the third gate signal end;

the compensation circuit comprises: a first compensation sub-circuit and a second compensation sub-circuit; the first compensation sub-circuit is respectively coupled with the second gate signal end, the third gate signal end, the initial power supply end, the second node and a third node, and the first compensation sub-circuit is used to output the initial power supply signal to the third node in response to the second gate driving signal, and control switching-on and switching-off between the second node and the third node in response to the third gate driving signal; and

the driving circuit is respectively coupled with the first node, a second power supply end and the second node, and the driving circuit is used to output a driving signal to the second node in response to the potential of the first node and a second power supply signal from the second power supply end.

11. The display substrate according to claim 10 , wherein among the plurality of pixel units, each pixel unit comprises: the light-emitting element and the pixel circuit coupled with the light-emitting element.

12. A display device, comprising a source driving circuit and the display substrate, which is connected to the source driving circuit, according to claim 10 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2022
From: WANG, ZHICHONG
To: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 060336/0461 →
Priority Claims (1)
CN 201910239897.6 · Mar 27, 2019 · national
Continuity (2)
Continuation 17256184
Related Publication 20220328010A1 · Oct 13, 2022