IP Library › Granted Patent US 11,747,852
Granted Patent B2
US 11,747,852 · App. 16/726,167 · Granted Sep 5, 2023

Method and apparatus for maintaining stable operation of servers in a data center

Inventors: Amitabh Mehra (Fort Collins, CO); Jeffrey N. Burley (Fort Collins, CO); Anil Harwani (Austin, TX)
Assignee: Advanced Micro Devices, Inc.
G06F1/08G06F1/26G06F11/3055G06F11/3058
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Quick Facts
Patent No.
US 11,747,852
App. No.
16/726,167
Granted
Sep 5, 2023
Kind
B2
Abstract

A method and apparatus for managing overclocking in a data center includes determining a frequency limit of a first processor of a first server in the data center. The voltage of the first processor is lowered to a stability point, and the frequency is lowered. The first server is tested for stability. Based upon the results of the test, the voltage and frequency modifications are deployed to a second processor of a second server in the data center.

Claims (40)

1. A method for managing overclocking in a data center, comprising:

determining a frequency limit of a first processor of a first server in the data center;

modifying a voltage of the first processor to a lowered voltage by lowering the voltage to a stability point;

modifying a frequency of the first processor to a lowered frequency limit by lowering the frequency limit based upon the lowered voltage;

testing the first server for stability;

based upon the testing, deploying modifications to a second processor of a second server in the data center using the lowered voltage and the lowered frequency limit; and

maintaining a higher effective frequency on a third processor of a third server in the data center in comparison to the first processor based on a workload of the data center.

2. The method of claim 1 , wherein the voltage of the first processor is lowered to a guardband level.

3. The method of claim 2 , wherein the voltage of the first processor is lowered to level that prevents an overcurrent in the first processor.

4. The method of claim 2 , wherein the voltage of the first processor is lowered to a level that prevents an overfrequency in the first processor.

5. The method of claim 2 , further comprising lowering the voltage of the first processor below the guardband level after determining the stability point.

6. The method of claim 1 , wherein the voltage and frequency modifications are deployed to plurality of servers in the data center.

7. The method of claim 1 , wherein a first core of the first processor is disabled.

8. The method of claim 1 , wherein the workload is determined based on a number of heavily threaded jobs that are executed.

9. The method of claim 1 , wherein the frequency limit is determined based on a maximum stable temperature at which the first processor can operate.

10. The method of claim 1 , wherein the first processor and the second processor are from a same bin of produced parts.

11. An apparatus for managing overclocking in a data center, the apparatus comprising:

a communication interface that is communicatively coupled to a first server including a first processor, a second server including a second processor, and a third server including a third processor; and

a processor that is communicatively coupled to the communication interface, wherein the processor:

determines a frequency limit for the first processor of the first server in the data center,

modifies a voltage of the first processor to a lowered voltage by lowering the voltage to a stability point,

modifies a frequency of the first processor to a lowered frequency limit by lowering the frequency limit based upon the lowered voltage,

tests the first server for stability to generate results,

based upon the results, deploys modifications to a second of processor of the second server in the data center using the lowered voltage and the lowered frequency limit, and

maintains a higher effective frequency on the third processor in comparison to the first processor based on a workload of the data center.

12. The apparatus of claim 11 , wherein the voltage of the first processor is lowered to a guardband level.

13. The apparatus of claim 12 , wherein the voltage of the first processor is lowered to level that prevents an overcurrent in the first processor.

14. The apparatus of claim 12 , wherein the voltage of the first processor is lowered to a level that prevents an over frequency in the first processor.

15. The apparatus of claim 12 , wherein the voltage of the first processor is lowered below the guardband level after determining the stability point.

16. The apparatus of claim 11 , wherein the voltage and frequency modifications are deployed to plurality of servers in the data center.

17. The apparatus of claim 11 , wherein a first core of the first processor is disabled.

18. The apparatus of claim 11 , wherein the workload is determined based on a number of heavily threaded jobs that are executed.

19. The apparatus of claim 11 , wherein the first processor and the second processor are from a same bin of produced parts.

20. A non-transitory computer-readable medium for managing overclocking in a data center, the non-transitory computer-readable medium having instructions recorded thereon, that when executed by a processor, cause the processor to execute a method comprising:

determining a frequency limit of a first processor of a first server in the data center;

modifying a voltage of the first processor to a lowered voltage by lowering the voltage to a stability point;

modifying a frequency of the first processor to a lowered frequency limit by lowering the frequency limit based upon the lowered voltage;

testing the first server for stability;

based upon the testing, deploying the—modifications to a second processor of a second server in the data center using the lowered voltage and the lowered frequency limit; and

maintaining a higher effective frequency on a third processor of a third server in the data center in comparison to the first processor based on a workload of the data center.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2020
From: MEHRA, AMITABH; BURLEY, JEFFREY N.; HARWANI, ANIL
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 051984/0036 →
Continuity (1)
Related Publication 20210191450A1 · Jun 24, 2021