Programmatic circuit partitioning and topology identification

1. A method comprising:

receiving a data object representing a circuit for a process technology, the circuit including a first sub-circuit and the first sub-circuit including a first electrical component and a second electrical component, the first electrical component and the second electrical component arranged in a first topology;

identifying the first sub-circuit in the circuit by comparing the first topology to a stored topology, the stored topology associated with the first process technology;

identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit;

determining a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values;

converting the identified first sub-circuit to a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having a third electrical component and a fourth electrical component arranged in a second topology; and

outputting the second sub-circuit.

2. The method of claim 1 , further comprising:

identifying a type of the first sub-circuit based on connections of the first electrical component and the second electrical component, and

wherein converting the identified first sub-circuit to the second sub-circuit comprises:

inputting the determined set of performance parameter values to one or more ML models of the identified type of the first sub-circuit for the processing technology;

receiving one or more sets of physical parameter values corresponding to one or more topologies associated with the type of the first sub-circuit;

selecting the second topology from the one or more topologies; and

associating physical parameters values of a set of physical parameter values corresponding to the selected second topology with the third electrical component and the fourth electrical component.

3. The method of claim 2 , wherein selecting the second topology is based on an optimization function.

4. The method of claim 3 , wherein the optimization function is based on a number of electrical components of topologies of the one or more topologies.

5. The method of claim 3 , wherein the optimization function is based on physical parameter values corresponding to one or more topologies.

6. The method of claim 1 , wherein the first ML model and the one or more ML models comprise neural networks.

7. The method of claim 1 , wherein a first arrangement of electrical components of the first topology differs from a second arrangement of electrical components of the second topology.

8. A non-transitory program storage device comprising instructions stored thereon to cause one or more processors to:

receive a data object representing a circuit for a process technology, the circuit including a first sub-circuit and the first sub-circuit including a first electrical component and a second electrical component, the first electrical component and the second electrical component arranged in a first topology;

identify a type of the first sub-circuit based on connections of the first electrical component and the second electrical component;

identify the first sub-circuit in the circuit by comparing the first topology to a stored topology, the stored topology associated with the first process technology;

identify a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit;

determine a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values;

convert the identified first sub-circuit to a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having a third electrical component and a fourth electrical component arranged in a second topology; and

output the second sub-circuit.

9. The non-transitory program storage device of claim 8 , wherein the instructions for converting the identified first sub-circuit to the second sub-circuit comprises instructions to cause the one or more processors to:

input the determined set of performance parameter values to one or more ML models of the identified type of the first sub-circuit for the processing technology;

receive one or more sets of physical parameter values corresponding to one or more topologies associated with the type of the first sub-circuit;

select the second topology from the one or more topologies; and

associate physical parameters values of a set of physical parameter values corresponding to the selected second topology with the third electrical component and the fourth electrical component.

10. The non-transitory program storage device of claim 9 , wherein selecting the second topology is based on an optimization function.

11. The non-transitory program storage device of claim 10 , wherein the optimization function is based on a number of electrical components of topologies of the one or more topologies.

12. The non-transitory program storage device of claim 10 , wherein the optimization function is based on physical parameter values corresponding to one or more topologies.

13. The non-transitory program storage device of claim 8 , wherein the first ML model and the one or more ML models comprise neural networks.

14. The non-transitory program storage device of claim 8 , wherein a first arrangement of electrical components of the first topology differs from a second arrangement of electrical components of the second topology.

15. An electronic device, comprising:

a memory; and

one or more processors operatively coupled to the memory, wherein the one or more processors are configured to execute instructions causing the one or more processors to:

receive a data object representing a circuit for a process technology, the circuit including a first sub-circuit and the first sub-circuit including a first electrical component and a second electrical component, the first electrical component and the second electrical component arranged in a first topology;

identify a type of the first sub-circuit based on connections of the first electrical component and the second electrical component;

identify the first sub-circuit in the circuit by comparing the first topology to a stored topology, the stored topology associated with the first process technology;

identify a set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit;

determine a set of performance parameter values for the first sub-circuit based on a first machine learning (ML) model of the first sub-circuit and the identified set of physical parameter values;

convert the identified first sub-circuit to a second sub-circuit for the process technology based on the determined set of performance parameter values, the second sub-circuit having a third electrical component and a fourth electrical component arranged in a second topology; and

output the second sub-circuit.

16. The electronic device of claim 15 , wherein the instructions for converting the identified first sub-circuit to the second sub-circuit comprises instructions to cause the one or more processors to:

input the determined set of performance parameter values to one or more ML models of the identified type of the first sub-circuit for the process technology;

receive one or more sets of physical parameter values corresponding to one or more topologies associated with the type of the first sub-circuit;

select the second topology from the one or more topologies; and

associate physical parameters values of a set of physical parameter values corresponding to the selected second topology with the third electrical component and the fourth electrical component.

17. The electronic device of claim 16 , wherein selecting the second topology is based on an optimization function.

18. The electronic device of claim 17 , wherein the optimization function is based on a number of electrical components of topologies of the one or more topologies.

19. The electronic device of claim 17 , wherein the optimization function is based on physical parameter values corresponding to one or more topologies.

20. The electronic device of claim 15 , wherein the first ML model and the one or more ML models comprise neural networks.