Heavy-hex connection topology to rectilinear physical layout
View Patent ↗Systems and techniques that facilitate mapping a heavy-hex qubit connection topology to a rectilinear physical qubit layout are provided. In various embodiments, a device can comprise a qubit lattice on a substrate. In various aspects, the qubit lattice can comprise one or more first qubit tiles. In various cases, the one or more first qubit tiles can have a first shape. In various instances, the qubit lattice can further comprise one or more second qubit tiles. In various cases, the one or more second qubit tiles can have a second shape. In various aspects, the one or more first qubit tiles can be tessellated with the one or more second qubit tiles.
1. A device, comprising:
a qubit lattice on a substrate, the qubit lattice comprising one or more first qubit tiles having a first shape tessellated with one or more second qubit tiles having a second shape, wherein the first shape is different from the second shape, wherein the first shape and the second shape are not hexagonal shapes, wherein one of the one or more first qubit tiles has twelve qubits and twelve interqubit connection buses, and wherein one of the one or more second qubit tiles has twelve qubits and twelve interqubit connection buses.
2. The device of claim 1 , wherein the qubit lattice exhibits a rectilinear physical layout.
3. The device of claim 1 , wherein the one or more first qubit tiles tessellated with the one or more second qubit tiles form a heavy-hex qubit connection topology in a rectilinear physical layout of the qubit lattice.
4. The device of claim 3 , wherein adjacent qubit tiles in the heavy-hex qubit connection topology share three qubits.
5. The device of claim 4 , wherein a qubit tile in the heavy-hex qubit connection topology is adjacent to four qubit tiles having a different shape than the qubit tile, and is adjacent to two qubit tiles having a same shape as the qubit tile.
6. The device of claim 1 , wherein the first shape of the one or more first qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
7. The device of claim 1 , wherein the second shape of the one or more second qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
8. A method, comprising:
forming a qubit lattice on a substrate, the qubit lattice comprising one or more first qubit tiles having a first shape tessellated with one or more second qubit tiles having a second shape, wherein the first shape is different from the second shape, wherein the first shape and the second shape are not hexagonal shapes, wherein one of the one or more first qubit tiles has twelve qubits and twelve interqubit connection buses, and wherein one of the one or more second qubit tiles has twelve qubits and twelve interqubit connection buses.
9. The method of claim 8 , wherein the qubit lattice exhibits a rectilinear physical layout.
10. The method of claim 8 , wherein the one or more first qubit tiles tessellated with the one or more second qubit tiles form a heavy-hex qubit connection topology in a rectilinear physical layout of the qubit lattice.
11. The method of claim 10 , wherein adjacent qubit tiles in the heavy-hex qubit connection topology share three qubits.
12. The method of claim 11 , wherein a qubit tile in the heavy-hex qubit connection topology is adjacent to four qubit tiles having a different shape than the qubit tile, and is adjacent to two qubit tiles having a same shape as the qubit tile.
13. The method of claim 8 , wherein the first shape of the one or more first qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
14. The method of claim 8 , wherein the second shape of the one or more second qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
15. An apparatus, comprising:
a qubit array on a substrate, the qubit array exhibiting a rectilinear physical qubit arrangement, and the qubit array comprising a plurality of first qubit tiles having a first shape tessellated with a plurality of second qubit tiles having a second shape, wherein the first shape is different from the second shape, wherein the first shape and the second shape are not hexagonal shapes, wherein one of the one or more first qubit tiles has twelve qubits and twelve interqubit connection buses, and wherein one of the one or more second qubit tiles has twelve qubits and twelve interqubit connection buses.
16. The apparatus of claim 15 , wherein the plurality of first qubit tiles tessellated with the plurality of second qubit tiles form a heavy-hex qubit connection topology in the rectilinear physical qubit arrangement of the qubit array.
17. The apparatus of claim 15 , wherein the first shape of the plurality of first qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
18. The apparatus of claim 15 , wherein the second shape of the plurality of second qubit tiles is illustrated below:
wherein dots represent qubits and wherein lines represent interqubit connection buses.
19. The device of claim 1 , wherein a first triangular shape formed by three qubits of the first shape aligns with a second triangular shape formed by three qubits of the second shape.
20. The method of claim 8 , wherein a first triangular shape formed by three qubits of the first shape aligns with a second triangular shape formed by three qubits of the second shape.