IP Library › Granted Patent US 11,755,406
Granted Patent B2
US 11,755,406 · App. 17/734,837 · Granted Sep 12, 2023

Error identification in executed code

Inventors: Antonino Mondello (Messina, IT); Alberto Troia (Munich, DE)
Assignee: Micron Technology, Inc.
G06F11/1008B60W50/0205B60W50/14G06F11/1076
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Quick Facts
Patent No.
US 11,755,406
App. No.
17/734,837
Granted
Sep 12, 2023
Kind
B2
Abstract

The present disclosure includes apparatuses, methods, and systems for error identification on executed code. An embodiment includes memory and circuitry configured to read data stored in a secure array of the memory, identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory, execute an integrity check to compare the ECC to the read data of the memory; and take an action in response to the comparison of the read data of the memory and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the memory.

Claims (20)

1. An apparatus, comprising:

a first memory device;

a second memory device; and

circuitry configured to:

receive read data from the first memory device;

receive an error correcting code (ECC);

compare the read data of the first memory device to the ECC provided by the second memory device by comparing a hash function corresponding to the data and a digest corresponding to the ECC; and

take an action in response to the comparison indicating that the ECC identified an error in the read data of the first memory device.

2. The apparatus of claim 1 , wherein the circuitry is associated with a vehicle.

3. The apparatus of claim 2 , wherein operations of the vehicle are halted in response to the error identified by the ECC.

4. The apparatus of claim 1 , wherein the error identified in the read data of the first memory device is corrected by the circuitry.

5. A method, comprising:

receiving read data of a first memory device, wherein receiving the read data of the first memory device includes receiving instructions to execute a routine to operate a powertrain of a host vehicle;

receiving an error correcting code (ECC) from a second memory device;

comparing the read data of the first memory device to the ECC provided by the second memory device by comparing a hash function corresponding to the data and a digest corresponding to the ECC; and

taking an action in response to the comparison indicating that the ECC identified an error in the read data of the first memory device.

6. The method of claim 5 , wherein taking an action further comprises transmitting to a controller in communication with the first memory device, an alert indicating that an error has been identified.

7. The method of claim 5 , wherein taking an action further comprises aborting, by the controller, the powertrain operations of the host vehicle in response to receiving an alert indicating that an error has been identified.

8. The method of claim 5 , further comprising determining how an error identified by the ECC affects the routine to operate the powertrain of the host vehicle.

9. The method of claim 5 , further comprising determining how a correction of an error identified by the ECC affects the routine to operate the powertrain of the host vehicle.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2022
From: MONDELLO, ANTONINO; TROIA, ALBERTO
To: MICRON TECHNOLOGY, INC.
Reel/Frame 059784/0899 →
Continuity (3)
Continuation 17119676 · Dec 11, 2020
Continuation 16362751 · Mar 25, 2019
Related Publication 20220261309A1 · Aug 18, 2022
Cited By (1)
US 12,512,856