IP Library › Granted Patent US 11,756,767
Granted Patent B2
US 11,756,767 · App. 17/475,909 · Granted Sep 12, 2023

Plasma processing apparatus and plasma processing method

Inventors: Takahiro Takeuchi (Miyagi, JP); Ken Kobayashi (Miyagi, JP)
Assignee: TOKYO ELECTRON LIMITED
H01J37/32146H01J37/32183
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Quick Facts
Patent No.
US 11,756,767
App. No.
17/475,909
Granted
Sep 12, 2023
Kind
B2
Abstract

A plasma processing apparatus includes: a chamber; first and second matching circuits; a first RF generator generating a first RF pulsed signal including a plurality of first pulse cycles in which each cycle includes first, second, and third periods, and the first RF pulsed signal has first, second, and third power levels in first, second, and third periods, respectively; a second RF generator generating a second RF pulsed signal including a plurality of second pulse cycles in which each cycle includes fourth and fifth periods, and the second RF pulsed signal has fourth and fifth power levels in fourth and fifth periods, respectively; and a third RF generator generating a third RF pulsed signal including a plurality of third pulse cycles in which each cycle includes sixth and seventh periods, and the third RF pulsed signal has sixth and seventh power levels in sixth and seventh periods, respectively.

Claims (52)

1. A plasma processing apparatus comprising:

a chamber;

a first matching circuit coupled to the chamber;

a second matching circuit coupled to the chamber;

a first RF generator coupled to the first matching circuit, and configured to generate a first RF pulsed signal including a plurality of first pulse cycles, each first pulse cycle including a first period, a second period, and a third period, and the first RF pulsed signal having a first power level in the first period, a second power level in the second period, and a third power level in the third period;

a second RF generator coupled to the second matching circuit, and configured to generate a second RF pulsed signal including a plurality of second pulse cycles, each second pulse cycle including a fourth period and a fifth period, the second RF pulsed signal having a frequency lower than a frequency of the first RF pulsed signal and having a fourth power level in the fourth period and a fifth power level in the fifth period, and the fourth period being 30 μs or less and set not to overlap with the first period; and

a third RF generator coupled to the second matching circuit, and configured to generate a third RF pulsed signal including a plurality of third pulse cycles, each third pulse cycle including a sixth period and a seventh period, the third RF pulsed signal having a frequency lower than the frequency of the second RF pulsed signal and having a sixth power level in the sixth period and a seventh power level in the seventh period, and the sixth period being set not to overlap with the first period and the fourth period.

2. The plasma processing apparatus according to claim 1 , wherein the third power level, the fifth power level, and the seventh power level are zero power levels.

3. The plasma processing apparatus according to claim 2 , wherein the first power level is larger than the second power level,

the second power level is larger than the third power level,

the fourth period overlaps with the third period, and

the sixth period overlaps with the second period.

4. The plasma processing apparatus according to claim 3 , wherein each of the plurality of first pulse cycles shifts from the first period to the third period, and shifts from the third period to the second period,

the fourth period coincides with the third period, and

the sixth period coincides with the second period.

5. The plasma processing apparatus according to claim 3 , wherein each of the plurality of first pulse cycles shifts from the first period to the third period, and shifts from the third period to the second period,

the fourth period starts after a delay time elapses since the shift from the first period to the third period, and ends simultaneously with the shift from the third period to the second period, and

the sixth period coincides with the second period.

6. The plasma processing apparatus according to claim 3 , wherein each of the plurality of first pulse cycles shifts from the first period to the second period, and shifts from the second period to the third period,

the fourth period starts after a delay time elapses since the shift from the second period to the third period, and ends simultaneously with an end of the third period, and

the fifth period coincides with the second period.

7. The plasma processing apparatus according to claim 2 , wherein the first power level is larger than the second power level,

the second power level is larger than the third power level,

the fourth period overlaps with the second period, and

the sixth period overlaps with the third period.

8. The plasma processing apparatus according to claim 7 , wherein each of the plurality of first pulse cycles shifts from the first period to the third period, and shifts from the third period to the second period,

the fourth period starts simultaneously with the shift from the third period to the second period, and ends before an end of the second period, and

the sixth period starts simultaneously with an end of the fourth period or after a delay time elapses after the end of the fourth period, and ends before the end of the second period.

9. The plasma processing apparatus according to claim 8 , wherein each of the plurality of first pulse cycles is 50 μs to 1,000 μs.

10. The plasma processing apparatus according to claim 9 , wherein the first RF pulsed signal is a frequency of 20 MHz to 60 MHz,

the second RF pulsed signal is a frequency of 1 MHz to 15 MHz, and

the third RF pulsed signal is a frequency of 100 kHz to 4 MHz.

11. The plasma processing apparatus according to claim 10 , wherein the third RF pulsed signal has a zero power level in a period when the second RF pulsed signal has a power level larger than zero.

12. The plasma processing apparatus according to claim 1 , wherein the first power level is larger than the second power level,

the second power level is larger than the third power level,

the fourth period overlaps with the third period, and

the sixth period overlaps with the second period.

13. The plasma processing apparatus according to claim 1 , wherein the first power level is larger than the second power level,

the second power level is larger than the third power level,

the fourth period overlaps with the second period, and

the sixth period overlaps with the third period.

14. The plasma processing apparatus according to claim 1 , wherein each of the plurality of first pulse cycles is 50 μs to 1,000 μs.

15. The plasma processing apparatus according to claim 1 , wherein the first RF pulsed signal is a frequency of 20 MHz to 60 MHz,

the second RF pulsed signal is a frequency of 1 MHz to 15 MHz, and

the third RF pulsed signal is a frequency of 100 kHz to 4 MHz.

16. The plasma processing apparatus according to claim 1 , wherein the third RF pulsed signal has a zero power level in a period when the second RF pulsed signal has a power level larger than zero.

17. A plasma processing apparatus comprising:

a chamber;

at least one first matching circuit coupled to the chamber;

a first RF generator coupled to the at least one first matching circuit, and configured to generate a first RF pulsed signal including a plurality of first pulse cycles, each first pulse cycle including a first period and a second period, and the first RF pulsed signal having a first power level in the first period and a second power level in the second period; and

a second RF generator coupled to the at least one first matching circuit, and configured to generate a second RF pulsed signal including a plurality of second pulse cycles, each the second pulse cycle including a third period and a fourth period, the second RF pulsed signal having a frequency lower than a frequency of the first RF pulsed signal, and having a third power level in the third period and a fourth power level in the fourth period, and the third period being 30 μs or less and set not to overlap with the first period,

wherein the second power level and the fourth power level are zero power levels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2021
From: TAKEUCHI, TAKAHIRO; KOBAYASHI, KEN
To: TOKYO ELECTRON LIMITED
Reel/Frame 057505/0322 →
Priority Claims (1)
JP 2020-154843 · Sep 15, 2020 · national
Continuity (1)
Related Publication 20220084789A1 · Mar 17, 2022