Contact plugs for semiconductor device
A semiconductor device and a method of forming the same are provided. A method includes forming a gate over a semiconductor structure. An epitaxial source/drain region is formed adjacent the gate. A dielectric layer is formed over the epitaxial source/drain region. An opening extending through the dielectric layer and exposing the epitaxial source/drain region is formed. A conductive material is non-conformally deposited in the opening. The conductive material fills the opening in a bottom-up manner.
1. A device comprising:
a substrate comprising an active region;
a first epitaxial source/drain region in the active region;
a first dielectric layer over the first epitaxial source/drain region;
a first conductive feature extending through the first dielectric layer and electrically coupled to the first epitaxial source/drain region; and
a first barrier layer at least partially disposed in the first dielectric layer, the first barrier layer being interposed between the first epitaxial source/drain region and a bottom surface of the first conductive feature, the first barrier layer not extending along a sidewall of the first conductive feature.
2. The device of claim 1 , further comprising a silicide layer interposed between the first epitaxial source/drain region and the first barrier layer, wherein a width of the first barrier layer is less than a width of the silicide layer.
3. The device of claim 1 , further comprising a self-assembled monolayer (SAM) at least partially disposed in the first dielectric layer, the SAM further extending along and in physical contact with a sidewall of the first conductive feature.
4. The device of claim 3 , wherein the SAM is in physical contact with a sidewall of the first barrier layer.
5. The device of claim 1 , further comprising:
a gate over the active region; and
a second conductive feature extending through the first dielectric layer and electrically coupled to the gate.
6. The device of claim 5 , further comprising a second barrier layer interposed between a bottom surface of the second conductive feature and the gate, the second barrier layer not extending along a sidewall of the second conductive feature.
7. The device of claim 5 , further comprising a second SAM extending along and in physical contact with a sidewall of the second conductive feature.
8. A device comprising:
a substrate comprising an active region;
a first epitaxial source/drain region extending into the active region;
a silicide layer over the first epitaxial source/drain region;
a first dielectric layer over the first epitaxial source/drain region;
a first conductive feature extending through the first dielectric layer and electrically coupled to the first epitaxial source/drain region;
a first barrier layer interposed between a bottom surface of the first conductive feature and the silicide layer;
a first self-assembled monolayer (SAM) in the first dielectric layer, the first SAM extending along and in physical contact with a sidewall of the first conductive feature, the first SAM further extending along a sidewall of the first barrier layer;
a second dielectric layer over the first dielectric layer and the first conductive feature;
a second conductive feature extending through the second dielectric layer and electrically coupled to the first conductive feature;
a second barrier layer interposed between a bottom surface of the second conductive feature and a top surface of the first conductive feature, and the second barrier layer being disposed over a top surface of the first SAM; and
a second SAM in the second dielectric layer, the second SAM extending along and in physical contact with a sidewall of the second conductive feature, the second SAM further extending along a sidewall of the second barrier layer.
9. The device of claim 8 , wherein the first conductive feature and the second conductive feature comprise different materials.
10. The device of claim 8 , wherein the second barrier layer does not extend along a sidewall of the second conductive feature.
11. The device of claim 8 , wherein the second conductive feature is wider than the first conductive feature.
12. The device of claim 8 , wherein the first SAM is in physical contact with a bottom surface of the second barrier layer.
13. The device of claim 8 , wherein the second SAM is in physical contact with a sidewall of the second barrier layer.
14. A device comprising:
a source/drain region extending into a semiconductor substrate;
a silicide in the source/drain region;
a first conductive barrier layer over and contacting the silicide;
a first dielectric layer over the source/drain region;
a first conductive feature extending through the first dielectric layer and electrically connected to the silicide, wherein the first conductive barrier layer physically separates the first conductive feature from the silicide; and
one or more first monolayers contacting a sidewall of the first conductive feature and a sidewall of the first conductive barrier layer, the one or more first monolayers and the first conductive barrier layer each being disposed in at least the first dielectric layer, wherein the one or more first monolayers comprise thiols or thiolate terminated molecules.
15. The device of claim 14 further comprising:
a second dielectric layer over the first dielectric layer;
a second conductive feature extending through the second dielectric layer and electrically connected to the first conductive feature; and
a second conductive barrier layer physically separating the second conductive feature from the first conductive feature.
16. The device of claim 15 , further comprising one or more second monolayers contacting a sidewall of the second conductive feature, wherein the one or more second monolayers comprise thiols or thiolate terminated molecules.
17. The device of claim 16 , wherein the one or more second monolayers further contact a sidewall of the second conductive barrier layer.
18. The device of claim 15 , wherein the first conductive feature and the second conductive feature comprise different materials.
19. The device of claim 14 , wherein the first conductive barrier layer does not extend along a sidewall of the first conductive feature.
20. The device of claim 14 , wherein the silicide is wider than the first conductive barrier layer.