IP Library › Granted Patent US 11,758,829
Granted Patent B2
US 11,758,829 · App. 17/283,037 · Granted Sep 12, 2023

Superconducting complex quantum computing circuit

Inventors: Yasunobu Nakamura (Tokyo, JP); Yutaka Tabuchi (Wako, JP); Shuhei Tamate (Tokyo, JP)
Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
H10N69/00G06N10/00H10N60/12H10N60/805
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Quick Facts
Patent No.
US 11,758,829
App. No.
17/283,037
Granted
Sep 12, 2023
Kind
B2
Abstract

A superconducting complex quantum computing circuit includes a circuit substrate in which a wiring pattern of a circuit element including quantum bits and measurement electrodes, and ground patterns are formed, and through-electrodes connecting the ground pattern formed on a first surface of the substrate surface and the ground pattern formed on a second surface; a first ground electrode including a first contact portion in contact with the ground patterns, and a first non-contact portion having a shape corresponding to a shape of the wiring pattern; a second ground electrode including a second contact portion in contact with the ground pattern; a control signal line provided with a contact spring pin at a tip; and a pressing member that presses the first ground electrode against the first surface of the circuit substrate or presses the second ground electrode against the second surface of the circuit substrate.

Claims (13)

1. A superconducting complex quantum computing circuit comprising:

a circuit substrate in which a wiring pattern of a circuit element, which includes a plurality of quantum bits and a plurality of measurement electrodes for observing a state of the quantum bit, and a plurality of ground pattern which are at a ground potential are formed on a substrate surface, and that includes a plurality of through-substrate electrodes which connect the ground pattern formed on a first surface of the substrate surface and the ground pattern formed on a second surface, which is a surface opposite the first surface, inside the substrate;

a first ground electrode that includes a first contact portion which is in contact with the ground pattern formed on the first surface of the circuit substrate, and a first non-contact portion which has a shape corresponding to a shape of the wiring pattern formed on the first surface;

a second ground electrode that includes a second contact portion which is in contact with the ground pattern formed on the second surface of the circuit substrate;

a plurality of control signal lines that are provided with a contact spring pin at each tip, the pin being in contact with a position corresponding to the quantum bit to press the first surface of the circuit substrate against the first ground electrode or to press the second surface of the circuit substrate against the second ground electrode; and

a pressing member that presses the first ground electrode against the first surface of the circuit substrate or presses the second ground electrode against the second surface of the circuit substrate,

wherein the first ground electrode is in contact with the ground pattern via a first extension portion formed by a superconducting material having extensibility higher than extensibility of the ground pattern, and

the second ground electrode is in contact with the ground pattern via a second extension portion formed by a superconducting material having extensibility higher than the extensibility of the ground pattern.

2. The superconducting complex quantum computing circuit according to claim 1 , wherein the quantum bit includes a first electrode that has a first coupling capacitance with a ground portion, and a second electrode that has a second coupling capacitance with a ground portion larger than the first coupling capacitance and that is connected to the first electrode either by a single Josephson junction or by a plurality of Josephson junctions.

3. The superconducting complex quantum computing circuit according to claim 2 , wherein the circuit substrate includes, at a quantum bit correspondence position, which is a position on the second surface, corresponding to a position of the quantum bit included in the wiring pattern formed on the first surface, a central electrode, a surrounding electrode that surrounds the surroundings of the central electrode, and a single or a plurality of connection electrodes that connects the central electrode and the surrounding electrode.

4. The superconducting complex quantum computing circuit according to any one of claims 1 to 3 , wherein the control signal line is arranged inside the first non-contact portion included in the first ground electrode at a position corresponding to a position of the quantum bit included in the wiring pattern formed on the first surface or inside a second non-contact portion included in the second ground electrode at a position corresponding to a quantum bit correspondence position, which is a position of the second surface corresponding to the position of the quantum bit included in the wiring pattern formed on the first surface, and supplies a control signal to the quantum bit.

5. The superconducting complex quantum computing circuit according to claim 4 , wherein the first non-contact portion and the second non-contact portion have a width and a height with sizes smaller than a wavelength of the control signal.

6. The superconducting complex quantum computing circuit according to claim 5 , wherein a frequency band of the control signal is a microwave band.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2021
From: NAKAMURA, YASUNOBU; TABUCHI, YUTAKA; TAMATE, SHUHEI
To: JAPAN SCIENCE AND TECHNOLOGY AGENCY
Reel/Frame 055830/0863 →
Priority Claims (1)
JP 2018-191287 · Oct 9, 2018 · national
Continuity (1)
Related Publication 20210343785A1 · Nov 4, 2021