IP Library › Granted Patent US 11,762,449
Granted Patent B2
US 11,762,449 · App. 17/563,605 · Granted Sep 19, 2023

Current control for a multicore processor

Inventors: Alexander Gendler (Kiriat Motzkin, IL); Efraim Rotem (Haifa, IL); Nir Rosenzweig (Givat Ella, IL); Krishnakanth V. Sistla (Portland, OR); Ashish V. Choubal (Austin, TX); Ankush Varma (Portland, OR)
Assignee: Intel Corporation
G06F1/324G06F1/26G06F1/3206G06F1/3243G06F1/3287G06F1/3296G06F1/3203G06F1/3237Y02D10/00
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Quick Facts
Patent No.
US 11,762,449
App. No.
17/563,605
Filed
Dec 28, 2021
Granted
Sep 19, 2023
Kind
B2
Art Unit
2187
USPC
713/322
Abstract

Apparatuses, methods and storage medium associated with current control for a multicore processor are disclosed herein. In embodiments, a multicore processor may include a plurality of analog current comparators, each analog current comparator to measure current utilization by a corresponding one of the cores of the multicore processor. The multicore processor may include one or more processors, devices, and/or circuitry to cause the cores to individually throttle based on measurements from the corresponding analog current comparators. In some embodiments, a memory device of the multicore processor may store instructions executable to operate a plurality power management agents to determine whether to send throttle requests based on a plurality of histories of the current measurements of the cores, respectively.

Claims (42)

1. An apparatus, comprising:

a multicore processor including:

a plurality of cores;

a plurality of current sensors, each current sensor to indicate whether a measured current utilization of one or more of the plurality of cores exceeds a threshold based on one or more measurements of current utilization by the one or more cores; and

control circuitry coupled to the plurality of current sensors, the control circuitry to cause the one or more cores to be individually throttled based on the indications from corresponding current sensors, wherein the control circuitry is to orchestrate current utilization of the multicore processor beyond an external voltage regulator overcurrent threshold for a period of time that is less than a response time associated with an external current sensor of the external voltage regulator.

2. The apparatus of claim 1 , further comprising:

a power control unit to select operating characteristics of the plurality of cores, the operating characteristics including frequency and voltage values.

3. The apparatus of claim 2 , wherein the power control unit is to transmit an indication of the operating characteristics to the control circuitry, the control circuitry to responsively set a frequency of the one or more cores based on the indication of the operating characteristics and the indications from corresponding current sensors.

4. The apparatus of claim 3 , wherein the power control unit is to set voltages of the plurality of cores by transmitting commands to the external voltage regulator, the external voltage regulator to responsively provide the voltages to the plurality of cores.

5. The apparatus of claim 4 , wherein the voltages provided to the plurality of cores are based, at least in part, on the external voltage regulator overcurrent threshold.

6. The apparatus of claim 1 , wherein the control circuitry is to execute instructions to operate one or more power management agents to throttle the one or more cores, respectively.

7. The apparatus of claim 1 , wherein the multicore processor further comprises:

firmware storage to store instructions which, when executed, cause the control circuitry to individually throttle the one or more cores.

8. The apparatus of claim 1 , further comprising:

a graphics processor coupled to the plurality of cores;

a communication interface to enable wired or wireless communication; and

a memory controller.

9. The apparatus of claim 1 , wherein:

the multicore processor is powered by the external voltage regulator which has the overcurrent threshold.

10. The apparatus of claim 1 , wherein each one of the plurality of current sensors is to measure current more than once for each current measurement by the external current sensor of the external voltage regulator.

11. A method, comprising:

measuring, by a plurality of current sensors, current utilization of a plurality of cores;

indicating, by each current sensor, whether a measured current utilization of one or more of the plurality of cores exceeds a threshold based on one or more measurements of current utilization by the one or more cores; and

causing, by control circuitry coupled to the plurality of current sensors, the one or more cores to be individually throttled based on the indications from corresponding current sensors, wherein the control circuitry is to orchestrate current utilization of the plurality of cores beyond an external voltage regulator overcurrent threshold for a period of time that is less than a response time associated with an external current sensor of the external voltage regulator.

12. The method of claim 11 , further comprising:

selecting, by a power control unit, operating characteristics of the plurality of cores, the operating characteristics including frequency and voltage values.

13. The method of claim 12 , wherein the power control unit is to transmit an indication of the operating characteristics to the control circuitry, the control circuitry to responsively set a frequency of the one or more cores based on the indication of the operating characteristics and the indications from corresponding current sensors.

14. The method of claim 13 , wherein the power control unit is to set voltages of the plurality of cores by transmitting commands to the external voltage regulator, and the external voltage regulator is to responsively provide the voltages to the plurality of cores.

15. The method of claim 14 , wherein the voltages provided to the plurality of cores are based, at least in part, on the external voltage regulator overcurrent threshold.

16. The method of claim 11 , further comprising:

executing instructions stored in firmware storage to cause the control circuitry to individually throttle the one or more cores.

17. A non-transitory, machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform operations of:

measuring, by a plurality of current sensors, current utilization of a plurality of cores;

indicating, by each current sensor, whether a measured current utilization of one or more of the plurality of cores exceeds a threshold based on one or more measurements of current utilization by the one or more cores; and

causing, by control circuitry coupled to the plurality of current sensors, the one or more cores to be individually throttled based on the indications from corresponding current sensors, wherein the control circuitry is to orchestrate current utilization of the plurality of cores beyond an external voltage regulator overcurrent threshold for a period of time that is less than a response time associated with an external current sensor of the external voltage regulator.

18. The non-transitory, machine-readable medium of claim 17 , further comprising program code to cause the machine to perform operations of:

selecting, by a power control unit, operating characteristics of the plurality of cores, the operating characteristics including frequency and voltage values.

19. The non-transitory, machine-readable medium of claim 18 , wherein the power control unit is to transmit an indication of the operating characteristics to the control circuitry, the control circuitry to responsively set a frequency of the one or more cores based on the indication of the operating characteristics and the indications from corresponding current sensors.

20. The non-transitory, machine-readable medium of claim 18 , wherein the power control unit is to set voltages of the plurality of cores by transmitting commands to the external voltage regulator, the external voltage regulator to responsively provide the voltages to the plurality of cores.

21. The non-transitory machine-readable medium of claim 20 , wherein the voltages provided to the plurality of cores are based, at least in part, on a the external voltage regulator overcurrent threshold.

22. The non-transitory, machine-readable medium of claim 17 , further comprising program code to cause the machine to perform an operation of:

executing instructions stored in firmware storage to cause the control circuitry to individually throttle the one or more cores.

Continuity (3)
Continuation 16836686 · Mar 31, 2020
Continuation 15182990 · Jun 15, 2016
Related Publication 20220197361A1 · Jun 23, 2022