Quantum computing system and operation method thereof

1. A quantum computing system comprising:

a first quantum chip including a plurality of first physical qubits;

a second quantum chip including a plurality of second physical qubits; and

a management device configured to manage the first quantum chip and the second quantum chip,

wherein the management device includes:

a physical qubit layer configured to manage physical qubit mapping including information about physical channels between the plurality of first physical qubits and the plurality of second physical qubits;

an abstraction qubit layer configured to manage abstraction qubit mapping including information about a plurality of abstraction qubits, which correspond to the plurality of first physical qubits and the plurality of second physical qubits, and abstraction channels between the plurality of abstraction qubits based on the physical qubit mapping;

a logical qubit layer configured to divide the plurality of abstraction qubits into a plurality of logical qubits and to manage logical qubit mapping including information about logical channels between the plurality of logical qubits, based on the abstraction qubit mapping; and

an application qubit layer configured to allocate at least one logical qubit corresponding to a qubit request received from a quantum application program based on the logical qubit mapping.

2. The quantum computing system of claim 1 , wherein the plurality of first physical qubits and the plurality of second physical qubits have different physical features from one another, and

wherein the physical features include at least one of a coherence time, an error rate, a gate calculation time, connectivity between qubits, and a quantum information communication execution time between qubits.

3. The quantum computing system of claim 1 , wherein the physical channels of the physical qubit mapping have irregular connectivity between the plurality of first physical qubits and the plurality of second physical qubits.

4. The quantum computing system of claim 3 , wherein the physical qubit mapping further includes information about a device channel between the first quantum chip and the second quantum chip.

5. The quantum computing system of claim 3 , wherein the abstraction channels of the abstraction qubit mapping have regular connectivity between the plurality of abstraction qubits.

6. The quantum computing system of claim 1 , wherein the abstraction qubit layer measures fidelity of each of the plurality of first physical qubits and each of the plurality of second physical qubits and maps a physical qubit, which has fidelity of a reference value or more, from among the plurality of first physical qubits and the plurality of second physical qubits onto the plurality of abstraction qubits.

7. The quantum computing system of claim 1 , wherein the abstraction channels of the abstraction qubit mapping include a swap operation between physical qubits corresponding to the plurality of abstraction qubits.

8. The quantum computing system of claim 1 , wherein the logical qubit mapping divides the plurality of abstraction qubits into the plurality of logical qubits based on a quantum error correction code.

9. The quantum computing system of claim 8 , wherein the number of abstraction qubits included in one of the plurality of logical qubits is determined based on a type of the quantum error correction code.

10. The quantum computing system of claim 9 , wherein the logical qubit layer determines the type of the quantum error correction code based on the number of the plurality of abstraction qubits, the number of the plurality of logical qubits, and an error rate of each of the plurality of logical qubits.

11. The quantum computing system of claim 1 , further comprising:

a first controller configured to control the first quantum chip; and

a second controller configured to control the second quantum chip.

12. The quantum computing system of claim 1 , further comprising:

a first controller configured to control the first quantum chip and the second quantum chip.

13. The quantum computing system of claim 1 , wherein the management device includes:

a memory configured to store a program code for the physical qubit layer, the abstraction qubit layer, the logical qubit layer, and the application qubit layer;

a central processing unit configured to execute the program code stored in the memory; and

an interface device configured to provide communication between the first quantum chip and the second quantum chip.

14. An operating method of a quantum computing system including a plurality of quantum chips, the method comprising:

generating physical qubit mapping including information about a plurality of physical qubits, which are included in each of the plurality of quantum chips, and physical channels between the plurality of physical qubits based on a physical structure of the plurality of quantum chips;

generating abstraction qubit mapping including information a plurality of abstraction qubits, which correspond to the plurality of physical qubits, and abstraction channels between the plurality of abstraction qubits based on the physical qubit mapping; and

dividing the plurality of abstraction qubits into a plurality of logical qubits based on the abstraction qubit mapping and generating logical qubit mapping including information about the plurality of logical qubits and logical channels between the plurality of logical qubits,

wherein the physical channels of the physical qubit mapping have irregular connectivity between the plurality of physical qubits, and

wherein the abstraction channels of the abstraction qubit mapping have regular connectivity between the plurality of abstraction qubits.

15. The method of claim 14 , further comprising:

receiving a qubit request from a quantum application program;

allocating logical qubits, which correspond to the qubit request, from among the plurality of logical qubits based on the logical qubit mapping;

allocating abstraction qubits, which correspond to the allocated logical qubits, from among the plurality of abstraction qubits based on the abstraction qubit mapping;

allocating physical qubits, which correspond to the allocated abstraction qubits, from among the plurality of physical qubits based on the physical qubit mapping; and

performing a calculation corresponding to the qubit request by using the allocated physical qubits.

16. The method of claim 14 , wherein the plurality of quantum chips have different types from one another.