IP Library Granted Patent US 11,769,801
Granted Patent B2
US 11,769,801 · App. 17/477,168 · Granted Sep 26, 2023

Silicon carbide semiconductor device with cell section and outer periphery section

Inventors: Yuichi Takeuchi (Kariya, JP); Ryota Suzuki (Toyota, JP); Tatsuji Nagaoka (Nagakute, JP); Sachiko Aoi (Nagakute, JP)
Assignees: DENSO CORPORATION; TOYOTA JIDOSHA KABUSHIKI KAISHA
H01L29/1608H01L21/02529H01L29/06H01L29/0623H01L29/0696H01L29/12H01L29/4236H01L29/66068H01L29/78H01L29/7813
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Quick Facts
Patent No.
US 11,769,801
App. No.
17/477,168
Granted
Sep 26, 2023
Kind
B2
Abstract

In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.

Claims (26)

1. A silicon carbide semiconductor device comprising:

a cell section; and

an outer peripheral section including a guard ring section surrounding an outer periphery of the cell section, wherein:

each of the cell section and the outer peripheral section includes:

a substrate having a first conductivity type or a second conductivity type;

a drift layer having the first conductivity type with an impurity concentration lower than the substrate, and arranged on a top surface side of the substrate; and

a current dispersion layer having the first conductivity type with an impurity concentration higher than the drift layer, and arranged on the drift layer;

the cell section further includes a vertical semiconductor element having:

a second-conductivity-type layer arranged in the current dispersion layer with a striped pattern shape;

a first electrode electrically connected to the second-conductivity-type layer; and

a second electrode electrically connected to a back surface side of the substrate;

the vertical semiconductor element flows a current between the first electrode and the second electrode;

the guard ring section includes a plurality of linear guard rings having the second conductivity type with a linear frame shape, arranged to extend from a top surface of the current dispersion layer, and surrounding the cell section;

the guard ring section includes a recessed portion provided by a concavity of the current dispersion layer deeper than the cell section, and the cell section protrudes from the guard ring section in a thickness direction of the substrate to provide a mesa portion with an island shape;

the guard ring section further includes an electric field relaxation layer having the first conductivity type or the second conductivity type with a carrier concentration lower than the current dispersion layer and the guard rings, arranged in the current dispersion layer, and extending from a boundary position between the mesa portion and the recessed portion toward an outside of an outer periphery of the mesa portion; and

an upper surface of the electric field relaxation layer is located at a position deeper than a top surface of each guard ring and shallower than a bottom surface of each guard ring.

2. The silicon carbide semiconductor device according to claim 1 , wherein:

the electric field relaxation layer is arranged in an entire area of the guard ring section.

3. The silicon carbide semiconductor device according to claim 1 , wherein:

the cell section includes a vertical semiconductor element having:

a base region having the second conductivity type and arranged on the current dispersion layer;

a source region having the first conductivity type with an impurity concentration higher than the drift layer, and arranged on the base region;

a trench gate structure having a gate insulation film and a gate electrode arranged on the gate insulating film, the gate insulating film being arranged in a gate trench disposed to extend from a top surface of the source region to a position deeper than the base region, and being disposed on an inner wall of the gate trench;

the second-conductivity-type layer arranged in another trench disposed to extend to a position deeper than the gate trench;

a source electrode electrically connected to the source region and the base region to provide the first electrode; and

a drain electrode electrically connected to a back surface side of the substrate to provide the second electrode.

Priority Claims (1)
JP 2016-240558 · Dec 12, 2016 · national
Continuity (3)
Division 16427413 · May 31, 2019
Continuation PCTJP2017044580 · Dec 12, 2017
Related Publication 20220005928A1 · Jan 6, 2022