Memory device with in-memory searching array and operation method thereof for implementing finite state machine

1. A memory device, comprising:

a first driver circuit;

a second driver circuit;

an in-memory-searching (IMS) array, comprising a plurality of memory cells, the memory cells coupled to the first driver circuit via a plurality of word lines, and coupled to the second driver circuit via a plurality of third signal lines, the memory cells configured to store a plurality of first strings of a plurality of string pairs generated according to a finite state machine (FSM);

a sensing circuitry, the sensing circuitry comprising a plurality of sensing units coupled to the memory cells via a plurality of second signal lines;

a working memory, coupled to the sensing circuitry, the working memory having a plurality of memory addresses one-to-one corresponding to the sensing units, and configured to store a plurality of second strings of the string pairs; and

a buffer, coupled to the working memory and the first driver circuit, the buffer configured to store a string representing a starting state of the FSM while the FSM is initialized,

each of the first strings comprises a first portion codewords and a second portion codewords, the first portion codewords represents a current state, and the second portion codewords represents a current input.

2. The memory device according to claim 1 , wherein each of the second strings represents a next state.

3. The memory device according to claim 1 , wherein the sensing circuitry is configured to cause the working memory to output the second string stored in the memory addresses corresponding to the sensing unit which has sensed a current greater than a predetermined threshold to the buffer according to a sensing result obtained by the sensing units.

4. The memory device according to claim 1 , wherein the word line driver, based on a clock signal, is configured to apply a plurality of first searching voltage representing an input of the FSM, and apply a plurality of second searching voltages according to the string stored in the buffer to the first signal lines.

5. An operation method of memory device, comprising:

programming a plurality of first strings of a plurality of string pairs representing a finite state machine (FSM) to an in-memory-searching (IMS) array of a memory device;

programming a plurality of second strings of the string pairs to a working memory of the memory device; and

programming a string representing a starting state of the FSM to a buffer of the memory device,

wherein each of the first strings comprises a first portion codewords and a second portion codewords, the first portion codewords represents a current state, and the second portion codewords represents a current input.

6. The operation method according to claim 5 , wherein each of the second strings represents a next state.

7. The operation method according to claim 5 , further comprising:

applying, by a first driver circuit of the memory device, based on a clock signal, a plurality of first searching voltage representing an input of the FSM, and a plurality of second searching voltages according to the string stored in the buffer to a plurality of first signal lines of the memory device.

8. The operation method according to claim 5 , further comprising:

causing, by a sensing circuitry of the memory device, a working memory of the memory device to output the second string stored in the memory addresses corresponding to a sensing unit of the sensing circuitry which has sensed a current greater than a predetermined threshold to the buffer according to a sensing result obtained by a plurality of sensing units of the sensing circuitry.