Controlled doping in a gate dielectric layer

1. A method, comprising:

forming a gate dielectric layer on a fin structure, wherein the gate dielectric layer comprises an interfacial layer on the fin structure and a high-k dielectric layer on the interfacial layer;

forming a diffusion barrier layer comprising a nitride material on the gate dielectric layer;

forming a dopant source layer comprising a metal oxide on the diffusion barrier layer, wherein a metal of the dopant source layer diffuses into the gate dielectric layer;

diffusing the metal through the diffusion barrier layer to a portion of the interfacial layer, wherein the portion of the interfacial layer is adjacent to the high-k dielectric layer; and

removing the dopant source layer.

2. The method of claim 1 , further comprising:

removing the diffusion barrier layer; and

forming a gate electrode on the gate dielectric layer.

3. The method of claim 1 , further comprising:

performing a nitridation treatment on the diffusion barrier layer; and

forming a gate electrode on the gate dielectric layer.

4. The method of claim 1 , wherein the diffusing the metal through the diffusion barrier layer to the portion of the interfacial layer comprises treating the dopant source layer under a thermal condition.

5. The method of claim 1 , further comprising forming an intermixing layer in a portion of the high-k dielectric layer adjacent to the diffusion barrier layer, wherein the intermixing layer is an intermixture of the high-k dielectric layer and the diffusion barrier layer.

6. The method of claim 1 , further comprising doping a portion of the high-k dielectric layer with the metal, wherein the portion of the high-k dielectric layer is adjacent to the interfacial layer.

7. The method of claim 6 , wherein the doping of the portion of the high-k dielectric layer comprises treating the dopant source layer under a thermal condition.

8. The method of claim 1 , the forming the diffusion barrier layer comprises:

depositing a layer of diffusion barrier material on the gate dielectric layer; and

etching a top portion of the layer of diffusion barrier material on the gate dielectric layer.

9. The method of claim 1 , the forming the diffusion barrier layer comprises:

depositing a first layer of diffusion barrier material on the gate dielectric layer;

depositing a second layer of diffusion barrier material in contact with the first layer of diffusion barrier material; and

etching a top portion of the second layer of diffusion barrier material on the gate dielectric layer.

10. A method, comprising:

forming a first gate dielectric layer on a first fin structure and a second gate dielectric layer on a second fin structure, wherein the first gate dielectric layer comprises a first interfacial layer on the first fin structure and a first high-k dielectric layer on the first interfacial layer, and wherein the second gate dielectric layer comprises a second interfacial layer on the second fin structure and a second high-k dielectric layer on the second interfacial layer;

forming a first diffusion barrier layer on the first and second gate dielectric layers;

removing the first diffusion barrier layer on the first gate dielectric layer;

forming a second diffusion barrier layer on the first gate dielectric layer and the first diffusion barrier layer;

forming a dopant source layer on the first and second diffusion barrier layers, wherein a dopant of the dopant source layer diffuses into the first and second gate dielectric layers;

doping a portion of the first interfacial layer and a portion of the second interfacial layer with the dopant, wherein:

the portion of the first interfacial layer is adjacent to the first high-k dielectric layer, and

the portion of the second interfacial layer is adjacent to the second high-k dielectric layer; and

removing the dopant source layer.

11. The method of claim 10 , further comprising:

removing the first and second diffusion barrier layers; and

forming first and second gate electrodes on the first and second gate dielectric layers, respectively.

12. The method of claim 10 , further comprising:

performing a nitridation treatment on the first and second diffusion barrier layers; and

forming first and second gate electrodes on the first and second gate dielectric layers, respectively.

13. The method of claim 10 , wherein the doping the portion of the first interfacial layer and the portion of the second interfacial layer comprises treating the dopant source layer under a thermal condition to diffuse the dopant to the portion of the first interfacial layer and the portion of the second interfacial layer.

14. The method of claim 10 , wherein the doped portion of the first interfacial layer comprises a thickness different from that of the doped portion of the second interfacial layer.

15. The method of claim 10 , further comprising forming an intermixing layer in the first high-k dielectric layer adjacent to the first diffusion barrier layer and a second intermixing layer in the second high-k dielectric layer adjacent to the second diffusion barrier layer.

16. The method of claim 10 , further comprising doping a portion of the first high-k dielectric layer and a portion of the second high-k dielectric layer, wherein the portion of the first high-k dielectric layer is adjacent to the first interfacial layer and the portion of the second high-k dielectric layer is adjacent to the second interfacial layer.

17. A method, comprising:

forming a gate dielectric layer on first and second fin structures, wherein the gate dielectric layer comprises an interfacial layer and a high-k dielectric layer;

forming a first diffusion barrier layer on the gate dielectric layer over the first fin structure;

forming a second diffusion barrier layer in contact with the first diffusion barrier layer over the first fin structure and in contact with the gate dielectric layer over the second fin structure;

forming a dopant source layer on the first and second diffusion barrier layers, wherein the dopant source layer comprises a dopant;

doping a portion of the interfacial layer with the dopant, wherein the doped portion of the interfacial layer is adjacent to the high-k dielectric layer; and

removing the dopant source layer.

18. The method of claim 17 , further comprising:

removing the first and second diffusion barrier layers; and

forming first and second gate electrodes on the gate dielectric layer.

19. The method of claim 17 , further comprising:

removing a top portion of the first diffusion barrier layer over the first fin structure prior to forming the dopant source layer.

20. The method of claim 17 , wherein the doping the portion of the interfacial layer comprises treating the dopant source layer under a thermal condition to diffuse the dopant to the portion of the interfacial layer.