Display device and a driving method thereof
A display device including: pixels; a data driver configured to start outputting data voltages to at least some of the pixels at a first time during a horizontal period, and end outputting the data voltages at a second time during the horizontal period; sensors; and a sensor driver configured to change a logic level of a sensing signal of at least some of the sensors at a third time different from the first time and the second time during the horizontal period, wherein at least one of the first time, the second time, and the third time is changed according to a number of times a logic level of a vertical synchronization signal is changed while a logic level of a horizontal synchronization signal is maintained.
1. A display device, comprising:
pixels;
a data driver configured to start outputting data voltages to at least some of the pixels at a first time during a horizontal period, and end outputting the data voltages at a second time during the horizontal period;
sensors; and
a sensor driver configured to change a logic level of a sensing signal of at least some of the sensors at a third time different from the first time and the second time during the horizontal period,
wherein at least one of the first time, the second time, and the third time is changed according to a number of times a logic level of a vertical synchronization signal is changed while a logic level of a horizontal synchronization signal is maintained.
2. The display device of claim 1 , wherein the horizontal period is from a time at which the horizontal synchronization signal is changed from a first logic level to a second logic level to a next time at which the horizontal synchronization signal is changed from the first logic level to the second logic level, and
wherein the logic level of the horizontal synchronization signal is the second logic level.
3. The display device of claim 2 , wherein, in the horizontal period, the vertical synchronization signal is changed at least once from a third logic level to a fourth logic level, while the horizontal synchronization signal is maintained at the second logic level, and
wherein, in the horizontal period, a period in which the vertical synchronization signal is maintained at the fourth logic level is shorter than a period in which the horizontal synchronization signal is maintained at the second logic level.
4. The display device of claim 3 , wherein, in the horizontal period, the vertical synchronization signal is maintained at the third logic level, while the horizontal synchronization signal is maintained at the first logic level.
5. The display device of claim 3 , further comprising a scan driver configured to output a scan signal having a turn-on level to at least some of the pixels from a fourth time to a fifth time during the horizontal period,
wherein the logic level of the sensing signal is maintained from the second time to the fifth time.
6. The display device of claim 1 , wherein an output period of the data voltages when the number of times the logic level of the vertical synchronization |signal| [RDR6] is changed is n times and an output period of the data voltages when the number of times the logic level of the vertical synchronization |signal| [RDR7] is changed is m times have the same length and have different phases with respect to the horizontal period, and
wherein the n and the m are different positive integers.
7. The display device of claim 6 , wherein a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization |signal| [RDR8] is changed is the n times and a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization |signal| [RDR9] is changed is the m times have the same length and have different phases with respect to the horizontal period.
8. The display device of claim 1 , wherein an output period of the data voltages when the number of times the logic level of the vertical synchronization |signal| [RDR10] is changed is n times and an output period of the data voltages when the number of times the logic level of the vertical synchronization |signal| [RDR11] is changed is m times have different lengths with respect to the horizontal period, and
wherein the n and the m are different positive integers.
9. The display device of claim 8 , wherein a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization |signal| [RDR12] is changed is the n times and a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization |signal| [RDR13] is changed is the m times have different lengths with respect to the horizontal period.
10. The display device of claim 2 , wherein the vertical synchronization signal has a third logic level or a fourth logic level, and
wherein a frame period is changed with respect to when the horizontal synchronization signal has the first logic level and the vertical synchronization signal has the fourth logic level.
11. A method for driving a display device, the method comprising:
starting, by a data driver, outputting of data voltages to at least some pixels at a first time during a horizontal period, and ending outputting of the data voltages at a second time during the horizontal period; and
changing, by a sensor driver, a logic level of a sensing signal of at least some sensors at a third time different from the first time and the second time during the horizontal period,
wherein at least one of the first time, the second time, and the third time is changed according to a number of times a logic level of a vertical synchronization signal is changed while a logic level of a horizontal synchronization signal is maintained.
12. The method of claim 11 , wherein the horizontal period is from a time at which the horizontal synchronization signal is changed from a first logic level to a second logic level to a next time at which the horizontal synchronization signal is changed from the first logic level to the second logic level, and
wherein the logic level of the horizontal synchronization signal is the second logic level.
13. The method of claim 12 , wherein, in the horizontal period, the vertical synchronization signal is changed at least once from a third logic level to a fourth logic level, while the horizontal synchronization signal is maintained at the second logic level, and
wherein, in the horizontal period, a period in which the vertical synchronization signal is maintained at the fourth logic level is shorter than a period in which the horizontal synchronization signal is maintained at the second logic level.
14. The method of claim 13 , wherein, in the horizontal period, the vertical synchronization signal is maintained at the third logic level, while the horizontal synchronization signal is maintained at the first logic level.
15. The method of claim 13 , further comprising outputting a scan signal having a turn-on level to at least some of the pixels from a fourth time to a fifth time during the horizontal period,
wherein the logic level of the sensing signal is maintained from the second time to the fifth time.
16. The method of claim 11 , wherein an output period of the data voltages when the number of times the logic level of the vertical synchronization signal is changed is n times and an output period of the data voltages when the number of times the logic level of the vertical synchronization signal is changed is m times have the same length and have different phases with respect to the horizontal period, and
wherein the n and the m are different positive integers.
17. The method of claim 16 , wherein a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization signal is changed is the n times and a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization signal is changed is the m times have the same length and have different phases with respect to the horizontal period.
18. The method of claim 11 , wherein an output period of the data voltages when the number of times the logic level of the vertical synchronization signal is changed is n times and an output period of the data voltages when the number of times the logic level of the vertical synchronization signal is changed is m times have different lengths with respect to the horizontal period, and
wherein the n and the m are different positive integers.
19. The method of claim 18 , wherein a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization signal is changed is the n times and a level maintenance period of the sensing signal when the number of times the logic level of the vertical synchronization signal is changed is the m times have different lengths with respect to the horizontal period.
20. The method of claim 12 , wherein the vertical synchronization signal has a third logic level or a fourth logic level, and
wherein a frame period is changed with respect to when the horizontal synchronization signal has the first logic level and the vertical synchronization signal has the fourth logic level.