Memory system having a non-volatile memory and a controller configured to switch a mode for controlling an access operation to the non-volatile memory

1. A memory system comprising:

a non-volatile memory including a plurality of memory cells; and

a controller configured to select one of a plurality of modes for controlling a write operation to the non-volatile memory, based on a first parameter received from a host, wherein

the plurality of modes includes at least a first mode and second mode; and

a length of a lifetime of data written to the non-volatile memory in the first mode is different from a length of a lifetime of data written to the non-volatile memory in the second mode.

2. The memory system of according to claim 1 , wherein

the first parameter includes a hint of a lifetime of data.

3. The memory system of according to claim 1 , wherein

the first parameter is included in a command provided from the host.

4. The memory system of according to claim 1 , wherein

the lifetime of the data written to the non-volatile memory in the second mode is longer than the lifetime of the data written to the non-volatile memory in the first mode.

5. The memory system according to claim 4 , wherein

the controlling of the write operation according to the first mode includes setting a size of increase in a program voltage during a programming loop executed in the non-volatile memory, to a first voltage increase size, and

the controlling of the write operation according to the second mode includes setting the size of increase in the program voltage during the programming loop executed in the non-volatile memory, to a second voltage increase size that is smaller than the first voltage increase size.

6. The memory system according to claim 4 , wherein

the controlling of the write operation according to the first mode includes controlling the non-volatile memory to store a first number of bits per memory cell, and

the controlling of the write operation according to the second mode includes controlling the non-volatile memory to store a second number of bits per memory cell, the second number being smaller than the first number.

7. The memory system according to claim 4 ,

wherein a user capacity of the non-volatile memory when the non-volatile memory is controlled according to the second mode is smaller than a user capacity of the non-volatile memory when the non-volatile memory is controlled according to the first mode.

8. The memory system according to claim 4 , wherein

the non-volatile memory further includes a plurality of word lines,

the controlling of the write operation according to the first mode includes controlling the non-volatile memory to write data to the plurality of memory cells using adjacent word lines among the plurality of word lines, and

the controlling of the write operation according to the second mode includes controlling the non-volatile memory to write data to the plurality of memory cells using every N word lines among the plurality of word lines, where N is 2 or more, and not to write data to the plurality of memory cells connected to the other word lines.

9. A method of controlling a non-volatile memory including a plurality of memory cells, the method comprising:

switching a mode for controlling an access operation to the non-volatile memory from a first mode to a second mode, in response to receiving from a host, a first command for instructing to switch the mode from the first mode to the second mode, and

controlling the access operation to the non-volatile memory according to the mode,

wherein the access operation controlled according to the second mode improves data retention relative to the access operation controlled according to the first mode.

10. The method according to claim 9 , further comprising

switching the mode from the second mode to the first mode, in response to receiving from the host, a second command for instructing to return to the first mode from the second mode.

11. The method according to claim 9 , wherein

the access operation is a write operation, and

the controlling of the write operation according to the first mode includes setting a size of increase in a program voltage during a programming loop executed in the non-volatile memory, to a first voltage increase size, and

the controlling of the write operation according to the second mode includes setting the size of increase in the program voltage during the programming loop executed in the non-volatile memory, to a second voltage increase size that is smaller than the first voltage increase size.

12. The method according to claim 9 , wherein

the access operation is a write operation,

the controlling of the write operation according to the first mode includes setting a read pass voltage to be applied to non-selected word lines during a write verification operation to a first voltage, and

the controlling of the write operation according to the second mode includes setting the read pass voltage to be applied to the non-selected word lines during the write verification operation to a second voltage that is higher than the first voltage.

13. The method according to claim 9 , wherein

the access operation is a write operation,

the controlling of the write operation according to the first mode includes controlling the non-volatile memory to store a first number of bits per memory cell, and

the controlling of the write operation according to the second mode includes controlling the non-volatile memory to store a second number of bits per memory cell, the second number being smaller than the first number.

14. The method according to claim 9 ,

wherein a user capacity of the non-volatile memory when the non-volatile memory is controlled according to the second mode is smaller than a user capacity of the non-volatile memory when the non-volatile memory is controlled according to the first mode.

15. The method according to claim 9 , wherein

the access operation is a read operation from the non-volatile memory,

the controlling of the read operation according to the first mode includes performing an error correction process on data read from the non-volatile memory at a first code rate, and

the controlling of the read operation according to the second mode includes performing the error correction process on the data read from the non-volatile memory at a second code rate that is lower than the first code rate.

16. The method according to claim 9 , wherein

the non-volatile memory further includes a plurality of word lines, and the access operation is a write operation,

the controlling of the write operation according to the first mode includes controlling the non-volatile memory to write data to the plurality of memory cells using adjacent word lines among the plurality of word lines, and

the controlling of the write operation according to the second mode includes controlling the non-volatile memory to write data to the plurality of memory cells using every N word lines among the plurality of word lines, where N is 2 or more, and not to write data to the plurality of memory cells connected to the other word lines.