Tungsten structures and methods of forming the structures
Described are methods for forming a tungsten conductive structure over a substrate, such as a semiconductor substrate. Described examples include forming a silicon-containing material, such as a doped silicon-containing material, over a supporting structure. The silicon-containing material is then subsequently converted to a tungsten seed material containing the dopant material. A tungsten fill material of lower resistance will then be formed over the tungsten seed material.
1. A method, comprising:
forming a doped silicon-containing material on surfaces at least partially defining a recess over a semiconductor substrate, wherein the recess has a width of 10-20 nm, and a depth of at least 50 nm;
reducing silicon of the silicon-containing material to form a tungsten seed material within the recess, in which a majority of the tungsten seed material is beta-phase tungsten; and
forming a tungsten fill over the tungsten seed material, wherein a majority of the tungsten of the tungsten fill is alpha phase tungsten, and a majority of the tungsten fill has a grain size having a maximum dimension of at least 80 nm.
2. The method of claim 1 , further comprising forming a dielectric material having an opening therein, the opening having a ratio of height to width of at least 2:2 relative to at least one axis, and forming at least a portion of the doped silicon-containing material within the opening.
3. The method of claim 2 , further comprising forming titanium nitride within the opening, and forming the doped silicon-containing material over the titanium nitride.
4. The method of claim 1 , wherein forming the doped silicon-containing material comprises depositing the silicon-containing material concurrently with a dopant of the doped silicon-containing material.
5. The method of claim 4 , wherein forming the doped silicon-containing material and the dopant is performed through chemical vapor deposition (CVD) using a disilane precursor, and a second precursor including the dopant material.
6. The method of claim 5 , wherein the dopant comprises chlorine.
7. The method of claim 5 , wherein the chemical vapor deposition further comprises use of dichlorosilane.
8. The method of claim 1 , wherein forming the doped silicon-containing material comprises depositing a silicon-containing material and doping the deposited silicon-containing material with a dopant.
9. The method of claim 8 , wherein forming the doped silicon-containing material is performed through chemical vapor deposition using a precursor comprising silicon and hydrogen.
10. The method of claim 1 , wherein forming the doped silicon-containing material is performed at least in part through chemical vapor deposition (CVD).
11. The method of claim 1 , wherein the dopant comprises one or more of chlorine, arsenic, and phosphorus.
12. The method of claim 1 , wherein a majority of tungsten in the tungsten seed material is beta phase tungsten.
13. The method of claim 1 , wherein converting at least a portion of the doped silicon-containing material to tungsten comprises reducing the silicon-containing material through exposure to a gas comprising tungsten.
14. The method of claim 13 , wherein the gas comprising tungsten comprises tungsten hexafluoride.
15. The method of claim 1 , wherein the tungsten seed material and the tungsten fill material form a conductive line over the semiconductor substrate.
16. The method of claim 15 , wherein the tungsten seed material and the tungsten fill material form a data line of a memory device.
17. The method of claim 1 , wherein the tungsten seed material and the tungsten fill material form a vertically-extending contact over the semiconductor substrate.
18. The method of claim 1 , further comprising performing depositing the tungsten fill at a temperature of at least 300° C. after deposition of the silicon-doped tungsten seed layer.
19. The method of claim 18 , wherein the tungsten fill is deposited by chemical vapor deposition (CVD).
20. A memory device, comprising:
a dielectric level comprising recesses with a width of 10-20 nm and a depth of at least 50 nm;
a tungsten seed layer disposed in the recesses, the tungsten seed layer including a material in addition to tungsten, and wherein a majority of the tungsten in the tungsten seed layer is beta-phase tungsten; and
a tungsten fill material disposed in the recesses on the tungsten seed layer;
wherein a majority of the tungsten fill material is alpha-phase tungsten having a grain size with a maximum dimension of at least 50 nanometers.
21. The memory device of claim 20 , comprising wherein at least 50% of the tungsten fill material has a grain size with a maximum dimension of at least about 100 nm.