Fast readout circuit for event-driven pixel matrix array

1. An event-driven sensor comprising:

a pixel array;

a column readout circuit coupled to column output lines of the pixel array, the column readout circuit comprising a plurality of column register cells, each column register cell being coupled to a corresponding one of the column output lines, wherein each column register cell is configured to activate a column event output signal in response to the detection of an event indicated on the column output line; and

a row readout circuit comprising a readout memory having a storage location corresponding to each pixel of the pixel array, the readout memory having sets of one or more row lines for writing to rows of memory locations of the readout memory, wherein each row output line of the pixel array is coupled, via a corresponding row line control circuit, to a corresponding one of the sets of one or more row lines of the readout memory, wherein:

the column output lines are column readout request lines, the column readout circuit being further coupled to acknowledgement column lines of the pixel array, and wherein the row output lines are row readout request lines, the row readout circuit being further coupled to acknowledgement row lines of the pixel array; and

the readout memory further comprises sets of one or more column lines for controlling write operations to columns of memory locations of the readout memory, each set of one or more column lines being controlled based on a corresponding one of the column event output signals.

2. The event-driven sensor of claim 1 , wherein each row line control circuit is configured to supply one or more data bits representing pixel data to the corresponding set of one or more row lines, wherein the pixel data is either a pixel value output by a pixel of the pixel array, or is generated by sampling a time-varying signal.

3. The event-driven sensor of claim 2 , wherein the row readout circuit comprises a data register storing the pixel data prior to writing the pixel data to the memory.

4. The event-driven sensor of claim 1 , wherein the readout memory is a dual-port memory.

5. The event-driven sensor of claim 1 , wherein the column register cells are arranged in groups, the column register cells of each group being coupled in series with each other to propagate a first flag signal from a first to a last column register cell the group, the event-driven sensor further comprising:

a first bypassing circuit for each group of column register cells, the first bypassing circuits being coupled in series with each other to propagate the first flag signal, each first bypassing circuit being configured to propagate the first flag signal:

to the first column register cell of its group if an event is indicated on one of the column output lines coupled to one of the column register cells of the group; and to a flag output of the first bypassing circuit, bypassing the column register cells of the group, if no event is indicated on one of the column output lines coupled to one of the column register cells of the group.

6. The event-driven sensor of claim 5 , wherein each group of column register cells comprises at least four column register cells.

7. The event-driven sensor of claim 5 , wherein the first bypassing circuits are arranged in groups, each group of first bypassing circuits comprising a plurality of the first bypassing circuits configured to propagate the first flag signal from a first to a last first bypassing circuit of the group, the event-driven sensor further comprising a second bypassing circuit for each group of first bypassing circuits, the second bypassing circuits being coupled in series with each other to propagate the first flag signal, each second bypassing circuit being configured to propagate the first flag signal to: the first bypassing circuit of its group of first bypassing circuits if an event is indicated on one of the column output lines coupled to one of the column register cells of the group of column register cells of one of the group of first bypassing circuits; and

to a flag output of the second bypassing circuit, bypassing the first bypassing circuits of the second group, if no event is indicated on one of the column output lines coupled to one of the column register cells of the group of column register cells of one of the group of first bypassing circuits.

8. The event-driven sensor of claim 1 , wherein a first pixel of the pixel array is configured to assert, in response to a detected event:

a column readout request on the column readout request line of the column of the first pixel, and to assert a row readout request on the row readout request line of the row of the first pixel in response to an acknowledgement signal on the acknowledgement column line.

9. The event-driven sensor of claim 8 , wherein the first pixel of the array is further configured to deactivate the column and row readout requests in response to the acknowledgement signals being asserted on the acknowledgement column and row lines.

10. The event-driven sensor of claim 1 , wherein each column output line is a shared column output line coupled to each of the pixels of its column, and each row output line is a shared row output line coupled to each of the pixels of its row.

11. The event-driven sensor of claim 1 , wherein each column output line is coupled in a daisy-chain to each of the pixels of its column, and each row output line is coupled in a daisy-chain to each of the pixels of its row.

12. A method of reading out an event from a pixel of an event-driven sensor, the method comprising:

activating, by a column register cell of a column readout circuit coupled to column output lines of a pixel array, a column event output signal in response to the detection of an event indicated on the column output line, wherein the column readout circuit comprises a plurality of said column register cells, each column register cell being coupled to a corresponding one of the column output lines; and

writing pixel data to a readout memory of a row readout circuit, the readout memory having a storage location corresponding to each pixel of the pixel array, and sets of one or more row lines for writing to rows of memory locations of the readout memory, wherein each row output line of the pixel array is coupled, via a corresponding row line control circuit, to a corresponding one of the sets of one or more row lines of the readout memory, wherein: the column output lines are column readout request lines, the column readout circuit being further coupled to acknowledgement column lines of the pixel array, and wherein the row output lines are row readout request lines, the row readout circuit being further coupled to acknowledgement row lines of the pixel array; and

the readout memory further comprises sets of one or more column lines for controlling write operations to columns of memory locations of the readout memory, each set of one or more column lines being controlled based on a corresponding one of the column event output signals.