IP Library Granted Patent US 11,803,436
Granted Patent B2
US 11,803,436 · App. 17/486,341 · Granted Oct 31, 2023

Storage device and storage system including the same

Inventors: Chul Ho Lee (Hwaseong-si, KR); Ki Jong Nam (Hwaseong-si, KR); Won-Gi Hong (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F11/076G01K3/005G06F3/0619G06F3/0659G06F3/0679G06F11/0727G06F11/3058G11C16/0483G11C16/10G11C16/26
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Quick Facts
Patent No.
US 11,803,436
App. No.
17/486,341
Granted
Oct 31, 2023
Kind
B2
Abstract

A storage device and a storage system including the same are provided. The storage device includes a nonvolatile memory with a valid page and a free page; a temperature sensor configured to sense a temperature of the nonvolatile memory; and a storage controller configured to implement: a patrol read module configured to read valid data stored in the valid page and identify a number of errors in the read valid data according to a set time period, and a retention module configured to, based on the temperature or the number of errors, read the valid data stored in the valid page, and write the valid data to the free page while controlling a threshold voltage distribution width corresponding to a value of the valid data written to the free page.

Claims (66)

1. A storage device comprising:

a nonvolatile memory comprising a valid page and a free page;

a temperature sensor configured to sense a temperature of the nonvolatile memory; and

a storage controller comprising at least one processor configured to control:

a patrol read module to read valid data stored in the valid page and identify a number of errors in the read valid data according to a set time period; and

a retention module to, based on the temperature or the number of errors, read the valid data stored in the valid page, and write the valid data to the free page while controlling a threshold voltage distribution width corresponding to a value of the valid data written to the free page,

wherein the storage device is further configured to receive a power-off period corresponding to the storage device, and

wherein the at least one processor is further configured to control the retention module to, further based on the power-off period, read the valid data stored in the valid page, and write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page.

2. The storage device of claim 1 , wherein the storage controller comprises a buffer memory, and

wherein the at least one processor is further configured to control the retention module to store the valid data read from the valid page in the buffer memory, and write the valid data stored in the buffer memory to the free page.

3. The storage device of claim 2 , wherein the nonvolatile memory comprises a first memory block and a second memory block separate from the first memory block, and

wherein the valid page is provided in the first memory block and the free page is provided in the second memory block.

4. The storage device of claim 1 , wherein the at least one processor is further configured to control the retention module to read the valid data stored in the valid page and write the valid data to the free page based on the power-off period being greater than or equal to a set power-off period.

5. The storage device of claim 1 , wherein the at least one processor is further configured to control the retention module to read the valid data stored in the valid page, and write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page based on the temperature being higher than or equal to a set temperature for a set time, or the number of errors being greater than or equal to a set value.

6. The storage device of claim 1 , wherein the at least one processor is further configured to control the retention module to:

based on the temperature being higher than or equal to a first temperature and lower than or equal to a second temperature for a set time, write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a first width,

based on the number of errors counted being a first value, write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the first width,

based on the temperature being higher than the second temperature for the set time, write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a second width, and

based on the number of errors being a second value, write the read valid data to the free page while controlling the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the second width,

wherein the first value is smaller than the second value, and

wherein the first width is greater than the second width.

7. The storage device of claim 1 , wherein the at least one processor is further configured to control the retention module to control the threshold voltage distribution width by writing the read valid data to the free page using a program voltage whose voltage level is changed in a stepwise manner.

8. The storage device of claim 7 , wherein the at least one processor is further configured to control the retention module to:

based on the temperature being higher than or equal to a first temperature and lower than or equal to a second temperature for a set time, write the read valid data to the free page using a first program voltage whose voltage level is changed in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a first width,

based on the number of errors being a first value, write the read valid data to the free page using the first program voltage whose voltage level is changed in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the first width,

based on the temperature being higher than the second temperature for the set time, write the read valid data to the free page using a second program voltage whose voltage level is changed in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a second width, and

based on the number of errors being a second value, write the read valid data to the free page using the second program voltage whose voltage level is changed in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the second width,

wherein the first value is smaller than the second value, and

wherein the first program voltage comprises a smaller number of steps than the second program voltage.

9. The storage device of claim 7 , wherein the at least one processor is further configured to control the retention module to:

based on the temperature being a first temperature, write the read valid data to the free page using a first program voltage whose voltage level is changed by a first voltage level in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a first width,

based on the number of errors being a first value, write the read valid data to the free page using the first program voltage whose voltage level is changed by the first voltage level in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the first width,

based on the temperature being a second temperature, write the read valid data to the free page using a second program voltage whose voltage level is changed by a second voltage level in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a second width, and

based on the number of errors being a second value, write the read valid data to the free page using the second program voltage whose voltage level is changed by the second voltage level in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to the second width,

wherein the first temperature is lower than the second temperature,

wherein the first value is smaller than the second value, and

wherein the first voltage level is greater than the second voltage level.

10. A storage system comprising:

a host controller configured to receive a retention level and a retention mode activation command, and generate a retention mode command indicating the retention level in response to the retention mode activation command; and

a storage controller comprising at least one processor, and a nonvolatile memory device comprising a valid page and a free page, wherein the at least one processor is configured to control a retention module to, in response to the retention mode command, read valid data stored in the valid page, and write the valid data to the free page according to the retention level while controlling a threshold voltage distribution width corresponding to a value of the valid data written to the free page.

11. The storage system of claim 10 , wherein the at least one processor is further configured to control the retention module to write the read valid data to the free page according to the retention level using a program voltage whose voltage level is changed in a stepwise manner to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page.

12. The storage system of claim 10 , wherein the storage controller further comprises a buffer memory, and

wherein the at least one processor is further configured to control the retention module to store the valid data read from the valid page in the buffer memory, and write the valid data stored in the buffer memory to the free page.

13. The storage system of claim 10 , wherein the threshold voltage distribution width corresponding to the value of the valid data stored in the valid page is wider than the threshold voltage distribution width corresponding to the value of the valid data written to the free page.

14. A storage system comprising:

a storage device;

a controller configured to monitor a power-off period during which the storage device maintains a power-off state, and provide a retention mode command to the storage device based on the power-off period being greater than or equal to a set power-off period; and

a power supply device configured to supply power to the storage device and the controller,

wherein the storage device comprises:

a nonvolatile memory comprising a valid page and a free page; and

a storage controller configured to, in response to the retention mode command, read valid data stored in the valid page, and write the valid data to the free page.

15. The storage system of claim 14 , wherein the controller is further configured to, based on the power-off period being greater than or equal to the set power-off period, control the power supply device to supply power to the storage device, and provide the retention mode command to the storage device.

16. The storage system of claim 14 , wherein the controller is further configured to identify a retention level based on the power-off period, the retention mode command indicating the retention level, and

wherein the storage controller is further configured to write the valid data to the free page according to the retention level while controlling a threshold voltage distribution width corresponding to a value of the valid data written to the free page.

17. The storage system of claim 16 , wherein the retention level indicates a first retention level or a second retention level,

wherein the retention mode command indicates a first retention mode command indicating the first retention level or a second retention mode command indicating the second retention level,

wherein the controller is further configured to provide the first retention mode command based on the power-off period being a first set power-off period,

wherein the controller is further configured to provide the second retention mode command based on the power-off period being a second set power-off period,

wherein the storage controller is further configured to write the valid data to the free page according to the first retention level to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a first width,

wherein the storage controller is further configured to write the valid data to the free page according to the second retention level to control the threshold voltage distribution width corresponding to the value of the valid data written to the free page to a second width,

wherein the first set power-off period is shorter than the second set power-off period, and

wherein the first width is greater than the second width.

18. The storage system of claim 14 , further comprising a temperature sensor configured to sense a temperature of the storage device,

wherein the controller is further configured to provide the retention mode command to the storage device based on the temperature being higher than or equal to a set temperature for a set time.

19. The storage system of claim 18 , wherein the controller is further configured to identify a retention level based on the temperature, and provide the retention mode command indicating the retention level to the storage device, and

wherein the storage controller is further configured to write the valid page to the free page according to the retention level to control a threshold voltage distribution width corresponding to a value of the valid data written to the free page.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2021
From: LEE, CHUL HO; NAM, KI JONG; HONG, WON-GI
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 057618/0073 →
Priority Claims (1)
KR 10-2020-0175534 · Dec 15, 2020 · national
Continuity (1)
Related Publication 20220188177A1 · Jun 16, 2022
Cited By (1)
US 12,248,360