IP Library › Granted Patent US 11,804,851
Granted Patent B2
US 11,804,851 · App. 16/832,804 · Granted Oct 31, 2023

Methods, systems, articles of manufacture, and apparatus to decode zero-value-compression data vectors

Inventors: Gautham Chinya (Sunnyvale, CA); Debabrata Mohapatra (Santa Clara, CA); Arnab Raha (Santa Clara, CA); Huichu Liu (Santa Clara, CA); Cormac Brick (San Francisco, CA)
Assignee: INTEL CORPORATION
H03M7/3082G06F16/2237G06N3/063G06N3/04G06N3/08
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Quick Facts
Patent No.
US 11,804,851
App. No.
16/832,804
Granted
Oct 31, 2023
Kind
B2
Abstract

Methods, systems, articles of manufacture, and apparatus are disclosed to decode zero-value-compression data vectors. An example apparatus includes: a buffer monitor to monitor a buffer for a header including a value indicative of compressed data; a data controller to, when the buffer includes compressed data, determine a first value of a sparse select signal based on (1) a select signal and (2) a first position in a sparsity bitmap, the first value of the sparse select signal corresponding to a processing element that is to process a portion of the compressed data; and a write controller to, when the buffer includes compressed data, determine a second value of a write enable signal based on (1) the select signal and (2) a second position in the sparsity bitmap, the second value of the write enable signal corresponding to the processing element that is to process the portion of the compressed data.

Claims (36)

1. An apparatus comprising:

a buffer monitor to monitor a buffer for a header including a value indicative of compressed data;

a data controller to, when the buffer includes compressed data, determine a first value of a sparse select signal based on (1) a select signal and (2) a first position in a sparsity bitmap, the first value of the sparse select signal corresponding to a processing element that is to process a portion of the compressed data; and

a write controller to, when the buffer includes compressed data, determine a second value of a write enable signal based on (1) the select signal and (2) a second position in the sparsity bitmap, the second value of the write enable signal corresponding to the processing element that is to process the portion of the compressed data.

2. The apparatus of claim 1 , wherein the data controller is to:

sum values of bits in the sparsity bitmap between the first position in the sparsity bitmap and a third position in the sparsity bitmap, the first position corresponding to a value of the select signal, the third position corresponding to a least significant bit of the sparsity bitmap; and

set the first value of the sparse select signal equal to the sum minus one.

3. The apparatus of claim 1 , wherein the data controller is to cause a multiplexer to transmit data to the processing element based on the first value of the sparse select signal.

4. The apparatus of claim 1 , wherein the write controller is to set the second value of the write enable signal equal to a value of a bit at the second position in the sparsity bitmap, the second position corresponding to a value of the select signal.

5. The apparatus of claim 1 , wherein the write controller is to cause the processing element to process data from a multiplexer based on the second value of the write enable signal.

6. The apparatus of claim 1 , wherein the write controller is to cause, via transmission of the write enable signal, the sparsity bitmap to be reconstructed at the processing element.

7. The apparatus of claim 1 , wherein the value indicative of compressed data indicates that data following the header includes the sparsity bitmap and a zero-value-compression data vector.

8. A non-transitory computer readable storage medium comprising instructions which, when executed, cause at least one processor to at least:

monitor a buffer for a header including a value indicative of compressed data;

when the buffer includes compressed data, determine a first value of a sparse select signal based on (1) a select signal and (2) a first position in a sparsity bitmap, the first value of the sparse select signal corresponding to a processing element that is to process a portion of the compressed data; and

when the buffer includes compressed data, determine a second value of a write enable signal based on (1) the select signal and (2) a second position in the sparsity bitmap, the second value of the write enable signal corresponding to the processing element that is to process the portion of the compressed data.

9. The non-transitory computer readable storage medium of claim 8 , wherein the instructions, when executed, cause the at least one processor to:

sum values of bits in the sparsity bitmap between the first position in the sparsity bitmap and a third position in the sparsity bitmap, the first position corresponding to a value of the select signal, the third position corresponding to a least significant bit of the sparsity bitmap; and

set the first value of the sparse select signal equal to the sum minus one.

10. The non-transitory computer readable storage medium of claim 8 , wherein the instructions, when executed, cause the at least one processor to cause a multiplexer to transmit data to the processing element based on the first value of the sparse select signal.

11. The non-transitory computer readable storage medium of claim 8 , wherein the instructions, when executed, cause the at least one processor to set the second value of the write enable signal equal to a value of a bit at the second position in the sparsity bitmap, the second position corresponding to a value of the select signal.

12. The non-transitory computer readable storage medium of claim 8 , wherein the instructions, when executed, cause the at least one processor to cause the processing element to process data from a multiplexer based on the second value of the write enable signal.

13. The non-transitory computer readable storage medium of claim 8 , wherein the instructions, when executed, cause, via transmission of the write enable signal, the sparsity bitmap to be reconstructed at the processing element.

14. The non-transitory computer readable storage medium of claim 8 , wherein the value indicative of compressed data indicates that data following the header includes the sparsity bitmap and a zero-value-compression data vector.

15. An apparatus comprising:

means for monitoring to monitor a buffer for a header including a value indicative of compressed data;

means for controlling data to, when the buffer includes compressed data, determine a first value of a sparse select signal based on (1) a select signal and (2) a first position in a sparsity bitmap, the first value of the sparse select signal corresponding to a processing element that is to process a portion of the compressed data; and

means for controlling writing to, when the buffer includes compressed data, determine a second value of a write enable signal based on (1) the select signal and (2) a second position in the sparsity bitmap, the second value of the write enable signal corresponding to the processing element that is to process the portion of the compressed data.

16. The apparatus of claim 15 , wherein the means for controlling data is to:

sum values of bits in the sparsity bitmap between the first position in the sparsity bitmap and a third position in the sparsity bitmap, the first position corresponding to a value of the select signal, the third position corresponding to a least significant bit of the sparsity bitmap; and

set the first value of the sparse select signal equal to the sum minus one.

17. The apparatus of claim 15 , wherein the means for controlling data is to cause a multiplexer to transmit data to the processing element based on the first value of the sparse select signal.

18. The apparatus of claim 15 , wherein the means for controlling writing is to set the second value of the write enable signal equal to a value of a bit at the second position in the sparsity bitmap, the second position corresponding to a value of the select signal.

19. The apparatus of claim 15 , wherein the means for controlling writing is to cause the processing element to process data from a multiplexer based on the second value of the write enable signal.

20. The apparatus of claim 15 , wherein the means for controlling writing cause, via transmission of the write enable signal, the sparsity bitmap to be reconstructed at the processing element.

21. The apparatus of claim 15 , wherein the value indicative of compressed data indicates that data following the header includes the sparsity bitmap and a zero-value-compression data vector.

Assignments (2)
EMPLOYEE AGREEMENT Recorded Sep 6, 2023
From: CHINYA, GAUTHAM
To: INTEL CORPORATION
Reel/Frame 064818/0652 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2022
From: RAHA, ARNAB; LIU, HUICHU; MOHAPATRA, DEBABRATA; BRICK, CORMAC
To: INTEL CORPORATION
Reel/Frame 059977/0737 →
Continuity (1)
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