Frequency mixer including non-linear circuit

1. A frequency mixer comprising:

a first matching circuit configured to generate a matched local oscillator (LO) signal based on an LO signal;

a non-linear circuit configured to generate a non-linear LO signal based on the matched LO signal;

a second matching circuit configured to generate a matched radio frequency (RF) signal based on an RF signal;

a mixing circuit configured to generate a mixed signal based on a mixing of the non-linear LO signal and the matched RF signal;

a third matching circuit configured to generate an intermediate frequency (IF) signal based on the mixed signal,

wherein the non-linear circuit includes a non-linear transistor, a bias transistor, and an internal matching circuit connected in series.

2. The frequency mixer of claim 1 , wherein the internal matching circuit includes a resistor, an inductor and a capacitor which are connected in parallel.

3. The frequency mixer of claim 2 , wherein a resistance of the resistor, an inductance of the inductor, and a capacitance of the capacitor are optimized to enhance at least one of an LO-to-RF isolation, an RF-to-LO isolation and an LO-to-IF isolation of the frequency mixer.

4. The frequency mixer of claim 1 , wherein the bias transistor is configured to operate in response to a bias voltage, and

wherein a level of the bias voltage is optimized to enhance at least one of an LO-to-RF isolation, an RF-to-LO isolation and an LO-to-IF isolation of the frequency mixer.

5. The frequency mixer of claim 1 , wherein the bias transistor is configured to operate in response to a bias voltage, and

wherein a level of the bias voltage is optimized to enhance at least one of an LO-to-RF isolation, an RF-to-LO isolation and an LO-to-IF isolation of the frequency mixer for a process change of an active element and a process change of a passive element occurring in a process of manufacturing the frequency mixer.

6. The frequency mixer of claim 1 , wherein the non-linear circuit is connected between a terminal through which the non-linear LO signal is generated and a first node to operate in response to the matched LO signal,

wherein the bias transistor is connected between the first node and a second node to operate in response to a bias voltage, and

wherein the internal matching circuit is connected between the second node and a ground node.

7. The frequency mixer of claim 6 , wherein the non-linear circuit further includes a bias voltage source configured to provide the bias voltage to a gate terminal of the bias transistor.

8. The frequency mixer of claim 6 , wherein the internal matching circuit includes:

a resistor connected between the second node and the ground node;

an inductor connected between the second node and the ground node; and

a capacitor connected between the second node and the ground node.

9. The frequency mixer of claim 6 , wherein a drain terminal of the non-linear transistor is connected to the terminal through which the non-linear LO signal is generated, and a source terminal of the non-linear transistor is connected to the first node, and

wherein a drain terminal of the bias transistor is connected to the first node and a source terminal of the bias transistor is connected to the second node.

10. The frequency mixer of claim 1 , wherein each of the non-linear transistor and the bias transistor is implemented with at least one of an N-channel metal oxide semiconductor (NMOS) transistor, a GaAs pseudomorphic high electron mobility transistor (PHEMT), a GaAs metamorphic high electron mobility transistor (MHEMT), an InP high electron mobility transistor (HEMT), and a GaN field effect transistor (FET).

11. The frequency mixer of claim 1 , wherein the frequency mixer includes a down-conversion frequency mixer that generates the IF signal having a third frequency obtained by subtracting a second frequency of the LO signal from a first frequency of the RF signal.

12. A frequency mixer that matches a local oscillator (LO) signal, generates a non-linear LO signal based on a matched LO signal, and generates an intermediate frequency (IF) signal based on the non-linear LO signal and a radio frequency (RF) signal, the frequency mixer comprising:

a first transistor connected between a terminal through which the non-linear LO signal is generated and a first node to operate in response to the matched LO signal;

a second transistor connected between the first node and a second node to operate in response to a bias voltage; and

an internal matching circuit connected between the second node and a ground node.

13. The frequency mixer of claim 12 , wherein the internal matching circuit includes:

a resistor connected between the second node and the ground node;

an inductor connected between the second node and the ground node; and

a capacitor connected between the second node and the ground node.

14. The frequency mixer of claim 13 , wherein a resistance of the resistor, an inductance of the inductor, and a capacitance of the capacitor are optimized to enhance at least one of an LO-to-RF isolation, an RF-to-LO isolation and an LO-to-IF isolation of the frequency mixer.

15. The frequency mixer of claim 12 , further comprising:

a bias voltage source configured to provide the bias voltage to a gate terminal of the second transistor.

16. The frequency mixer of claim 15 , wherein a level of the bias voltage is optimized to enhance at least one of an LO-to-RF isolation, an RF-to-LO isolation and an LO-to-IF isolation of the frequency mixer for a process change of an active element and a process change of a passive element occurring in a process of manufacturing the frequency mixer.