IP Library Granted Patent US 11,822,908
Granted Patent B1
US 11,822,908 · App. 18/167,448 · Granted Nov 21, 2023

Extensible compilation using composite programming for hardware

Inventors: Eashan Krishna Hatti (Charlestown, WV); Harsha Mysore Hatti (Charlestown, WV)
Assignee: CuraeChoice, Inc.
G06F8/4434
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Quick Facts
Patent No.
US 11,822,908
App. No.
18/167,448
Granted
Nov 21, 2023
Kind
B1
Abstract

Systems, methods, and machine-readable media are disclosed for enabling high-performance programming via a composite programming language that gives programmers complete control over the compilation process. The composite programs include two language levels: an object program level (source code), and a metaprogram level that describes how a compiler should be customized in order to optimize the source code for a target hardware environment. When an augmented compiler receives a composite program, it recognizes the metaprogram and implements the one or more parameters specified within the composite program to optimize the compiler for a given target. Once the augmented compiler has been, it proceeds with compiling the source code included in the composite program. The compiled code is then output as machine language and may be executed by one or more computing systems.

Claims (58)

1. A method, comprising:

receiving, by a computing device, a composite computer program, the composite computer program comprising first code instructions at an object program level and second code instructions at a metaprogram level;

customizing, by the computing device, a compiler with one or more optimization instructions contained in the second code instructions;

compiling, by the computing device, the first code instructions using the customized compiler to produce an optimized set of machine code for the computing device; and

executing, by the computing device, the optimized set of machine code.

2. The method of claim 1 , wherein the first code instructions comprise at least one level of abstraction above machine code.

3. The method of claim 1 , wherein the optimized set of machine code is optimized by the customized compiler for a specified hardware configuration of the computing device based on the second code instructions.

4. The method of claim 1 , wherein the customizing further comprises:

producing, by the computing device executing the second code instructions, a plurality of alternative optimization results of a combination of optimizations for the compiler to implement; and

pruning, by the computing device executing the second code instructions, one or more of the plurality of alternative optimization results using a cost measure.

5. The method of claim 1 , further comprising:

receiving, by the computing device, a manual modification to one or more parameters specified in the second code instructions; and

repeating the customizing, compiling, and executing according to the modification.

6. The method of claim 1 , further comprising:

implementing, by the computing device executing the composite computer program, a machine learning algorithm to determine one or more parameters to modify to optimize the first code instructions for a particular hardware platform;

modifying, automatically by the computing device, the determined one or more parameters specified in the second code instructions; and

repeating the customizing, compiling, and executing according to the modification.

7. The method of claim 6 , further comprising:

receiving, by the computing device, one or more outcome goals as the second code instructions for the machine learning algorithm implementation.

8. The method of claim 1 , wherein the one or more optimization instructions contained in the second code instructions comprises at least one of constant folding, monomorphization, or list fusion.

9. A computing device, comprising:

a memory containing machine readable medium comprising machine executable code having stored thereon instructions for performing a method of implementing a composite computer program, the composite computer program comprising first code instructions at an object program level and second code instructions at a metaprogram level; and

a processor coupled to the memory, the processor configured to execute the machine executable code to cause the processor to:

receive the composite computer program;

customize a compiler of the computing device with one or more optimization instructions contained in the second code instructions;

compile only the first code instructions using the customized compiler to produce an optimized set of machine code for the computing device; and

execute the optimized set of machine code.

10. The computing device of claim 9 , wherein the first code instructions comprise at least one level of abstraction above machine code.

11. The computing device of claim 9 , wherein the optimized set of machine code is optimized by the customized compiler for a specified hardware configuration of the computing device based on the second code instructions.

12. The computing device of claim 9 , wherein the processor is further configured, as part of the customizing, to:

produce a plurality of alternative optimization results of a combination of optimizations for the compiler to implement; and

prune one or more of the plurality of alternative optimization results using a cost measure.

13. The computing device of claim 9 , wherein the processor is further configured to:

receive a manual modification to one or more parameters specified in the second code instructions; and

repeat the customization, compilation, and execution according to the modification.

14. The computing device of claim 9 , wherein the processor is further configured to:

implement a machine learning algorithm to determine one or more parameters to modify to optimize the first code instructions for a particular hardware platform;

modify, automatically by the computing device, the determined one or more parameters specified in the second code instructions; and

repeat the customization, compilation, and execution according to the modification.

15. The computing device of claim 14 , wherein the processor is further configured to:

receive one or more outcome goals as the second code instructions for the machine learning algorithm implementation.

16. A non-transitory computer-readable medium having program code recorded thereon, the program code comprising:

code for causing a computing device to receive a composite computer program, the composite computer program comprising first code instructions at an object program level and second code instructions at a metaprogram level;

code for causing the computing device to customize a compiler with one or more optimization instructions contained in the second code instructions;

code for causing the computing device to compile the first code instructions using the customized compiler to produce an optimized set of machine code for the computing device; and

code for causing the computing device to execute the optimized set of machine code.

17. The non-transitory computer-readable medium of claim 16 , wherein the optimized set of machine code is optimized by the customized compiler for a specified hardware configuration of the computing device based on the second code instructions.

18. The non-transitory computer-readable medium of claim 16 , further comprising as part of the customizing:

code for causing the computing device to produce a plurality of alternative optimization results of a combination of optimizations for the compiler to implement; and

code for causing the computing device to prune one or more of the plurality of alternative optimization results using a cost measure.

19. The non-transitory computer-readable medium of claim 16 , further comprising:

code for causing the computing device to receive a manual modification to one or more parameters specified in the second code instructions; and

code for causing the computing device to repeat the customization, compilation, and execution according to the modification.

20. The non-transitory computer-readable medium of claim 16 , further comprising:

code for causing the computing device to receive one or more outcome goals as the second code instructions for a machine learning algorithm implementation;

code for causing the computing device to implement a machine learning algorithm to determine one or more parameters to modify to optimize the first code instructions for a particular hardware platform, based on the received one or more outcome goals;

code for causing the computing device to automatically modify the determined one or more parameters specified in the second code instructions; and

code for causing the computing device to repeat the customization, compilation, and execution according to the modification.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2023
From: HATTI, EASHAN KRISHNA; HATTI, HARSHA MYSORE
To: CURAECHOICE, INC.
Reel/Frame 062659/0169 →
Cited By (4)
US 12,277,411 US 12,386,601 US 12,393,407 US 12,602,212