IP Library Granted Patent US 12,393,407
Granted Patent B2
US 12,393,407 · App. 18/424,954 · Granted Aug 19, 2025

Matching binary code to intermediate representation code

Inventor: Itay Bookstein (Tel Aviv, IL)
Assignee: Next Silicon Ltd
G06F8/443G06F8/54
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Quick Facts
Patent No.
US 12,393,407
App. No.
18/424,954
Granted
Aug 19, 2025
Kind
B2
Abstract

A system for generating executable code of a software program that is matched with an intermediate representation (IR) of a source code of the software program. The system comprises a processor adapted for adding one or more annotation entries, each for a location in the IR, to program data in the IR. An internal annotation entry is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table of the IR. The processor is further adapted for compiling the IR to produce a binary object comprising the annotation entries, and providing the binary object to a linker or to a dynamic loader to update in an executable object an executable internal annotation entry associated with an internal annotation entry to reference run-time location in the executable object.

Claims (53)

1. A system for generating executable code, comprising at least one hardware processor adapted for:

to program data in an intermediate representation (IR) of a source code of a software program, the IR representing the source code independent of at least one of a source programming language and a target machine language, and

comprising a global IR symbol table comprising at least some of one or more IR symbols generated when producing the IR, each IR symbol referencing a location in the IR, adding one or more annotation entries, each for one of one or more locations in the IR,

wherein at least one internal annotation entry of the one or more annotation entries is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table;

compiling the IR to produce a binary software object comprising binary program data, where the binary program data comprises the one or more annotation entries;

updating one or more executable internal annotation entries in a binary executable software object generated using the binary software object, each generated for one of the at least one internal annotation entries, to reference a run-time location in the binary executable software object where the run-time location is associated with the internal location in the IR of the at least one internal annotation entry, by providing the binary software object to at least one of a linker and a dynamic loader; and

providing the IR comprising the one or more annotation entries and the binary executable software object comprising the updated one or more executable internal annotation entries to at least one management software object to distribute one or more services provided by the software program among one or more processing circuitries;

wherein at least one of the one or more executable internal annotation entries is updated in the binary executable software object when linking the binary software object to produce the binary executable software object or when loading the binary executable software object for execution by the dynamic loader.

2. The system of claim 1 , wherein the internal location in the IR is a location in the IR of an IR entity selected from the group of IR entities consisting of: a function identifier, a variable identifier, a function argument identifier, an instruction identifier, and a label identifier.

3. The system of claim 2 , wherein the IR further comprises a plurality of basic-blocks, each associated with one of a plurality of execution blocks of the software program; and

wherein the label identifier identifies one of the plurality of basic-blocks.

4. The system of claim 1 , wherein at least one of the at least one internal annotation entries comprises at least one of: an internal IR symbol of the one or more IR symbols that is not in the global IR symbol table, an identified instruction operation code, an identified value in an instruction, and a reference to a program counter.

5. The system of claim 1 , wherein the at least one hardware processor is further configured for providing the binary executable software object to at least one other hardware processor executing the dynamic loader; and

wherein at least one of the one or more executable internal annotation entries is updated in the binary executable software object when the dynamic loader configures the at least one other hardware processor to execute the binary executable software object.

6. The system of claim 5 , wherein the at least one other hardware processor is the at least one hardware processor.

7. The system of claim 1 , wherein the at least one hardware processor is further adapted for:

collecting a plurality of statistical values while executing at least part of the binary executable software object; and

further providing the plurality of statistical values to the at least one management software object.

8. The system of claim 7 , wherein at least one of the plurality of statistical values is indicative of one of: an outcome of executing a control-flow instruction, a data value of a variable of the software program, a memory access pattern, and a memory virtual address translation.

9. The system of claim 7 , wherein the at least one hardware processor is further adapted for inserting a plurality of telemetry intermediate computer instructions into the plurality of intermediate computer instructions, for the purpose of collecting the plurality of statistical values.

10. The system of claim 7 , wherein the at least one hardware processor is further adapted for providing the plurality of statistical values, the IR comprising the one or more annotation entries and the binary executable software object comprising the updated one or more internal annotation entries to the at least one management software object for the purpose of further performing at least one management task.

11. The system of claim 10 , wherein the at least one management task comprises performing an analysis of the plurality of statistical values.

12. The system of claim 11 , wherein the at least one management task further comprises configuring at least one processing circuitry, connected to the at least one hardware processor, for executing at least part of the binary executable software object, where the at least part of the binary executable software object is identified according to the analysis of the plurality of statistical values and the one or more updated executable internal annotation entries.

13. The system of claim 10 , wherein the at least one management task further comprises optimizing a plurality of intermediate computer instructions of the IR based on an association between at least some of the plurality of statistical values and the internal location in the IR, to produce a new IR of the source code, comprising a new plurality of intermediate computer instructions;

producing a new binary software object by compiling the new IR; and

producing a new binary executable software object using the new binary software object.

14. The system of claim 13 , wherein the at least one management task further comprises providing at least part of the new binary executable software object to the at least one hardware processor for execution instead of at least part of the binary executable software object.

15. The system of claim 13 , wherein the at least one management task further comprises configuring at least one processing circuitry, connected to the at least one hardware processor, for executing at least part of the new binary executable software object.

16. The system of claim 15 , wherein at least one of the at least one processing circuitry is selected from the group of processing circuitries consisting of: a central processing unit, a multi-core central processing unit (CPU), a data processing unit (DPU), a microcontroller unit (MCU), an accelerated processing unit (ACU), a field-programmable gate array (FPGA), a coarse-grained reconfigurable architecture (CGRA), a neural-network accelerator, an intelligence processing unit (IPU), an application-specific integrated circuit (ASIC), a quantum computer, and an interconnected computing grid, comprising a plurality of reconfigurable logical elements connected by a plurality of configurable data routing junctions.

17. The system of claim 15 , wherein the at least one processing circuitry is further configured for:

collecting another plurality of statistical values while executing the at least part of the new binary executable software object; and

providing the other plurality of statistical values to the at least one hardware processor.

18. The system of claim 13 , wherein the at least one management task further comprises adding to the new IR one or more new annotation entries, each for one of one or more new IR locations of the new IR.

19. The system of claim 7 , wherein the at least some of the plurality of statistical values and the internal location in the IR are associated using the binary executable software object comprising the updated one or more executable internal annotation entries.

20. A method for generating executable code, comprising:

to program data in an intermediate representation (IR) of a source code of a software program, the IR representing the source code independent of at least one of a source programming language and a target machine language, and

comprising a global IR symbol table comprising at least some of one or more IR symbols generated when producing the IR, each IR symbol referencing a location in the IR, adding one or more annotation entries, each for one of one or more locations in the IR, wherein at least one internal annotation entry of the one or more annotation entries is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table;

compiling the IR to produce a binary software object comprising binary program data, where the binary program data comprises the one or more annotation entries;

updating one or more executable internal annotation entries in a binary executable software object generated using the binary software object, each generated for one of the at least one internal annotation entries, to reference a run-time location in the binary executable software object where the run-time location is associated with the internal location in the IR of the at least one internal annotation entry, by providing the binary software object to at least one of a linker and a dynamic loader;

collecting a plurality of statistical values while executing at least part of the binary executable software object; and

providing the IR comprising the one or more annotation entries and the binary executable software object comprising the updated one or more executable internal annotation entries to at least one management software object to distribute one or more services provided by the software program among one or more processing circuitries;

wherein at least one of the one or more executable internal annotation entries is updated in the binary executable software object when linking the binary software object to produce the binary executable software object or when loading the binary executable software object for execution by the dynamic loader.

21. A system for executing a software program, comprising at least one hardware processor adapted for:

accessing a binary executable software object produced by:

to program data in an intermediate representation (IR) of a source code of a software program, the IR representing the source code independent of at least one of a source programming language and a target machine language and

comprising a global IR symbol table comprising at least some of one or more IR symbols generated when producing the IR, each IR symbol referencing a location in the IR, adding one or more annotation entries, each for one of one or more locations in the IR,

wherein at least one internal annotation entry of the one or more annotation entries is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table;

compiling the IR to produce a binary software object comprising binary program data, where the binary program data comprises the one or more annotation entries;

updating one or more executable internal annotation entries in a binary executable software object generated using the binary software object, each generated for one of the at least one internal annotation entries, to reference a run-time location in the binary executable software object where the run-time location is associated with the internal location in the IR of the at least one internal annotation entry, by providing the binary software object to at least one of a linker and a dynamic loader;

executing at least part of the binary executable software object;

collecting a plurality of statistical values while executing the at least part of the binary executable software object; and

providing the IR comprising the one or more annotation entries and the binary executable software object comprising the updated one or more executable internal annotation entries to at least one management software object to distribute one or more services provided by the software program among one or more processing circuitries;

wherein at least one of the one or more executable internal annotation entries is updated in the binary executable software object when linking the binary software object to produce the binary executable software object or when loading the binary executable software object for execution by the dynamic loader.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2024
From: BOOKSTEIN, ITAY
To: NEXT SILICON LTD
Reel/Frame 066318/0685 →
Continuity (2)
Continuation 17588430 · Jan 31, 2022
Related Publication 20240168736A1 · May 23, 2024
References Cited (53)
US 5930509A · Yates et al. · 1999 [cited by applicant]
US 5966541A · Agarwal · 1999 [cited by applicant]
US 6226789B1 · Tye et al. · 2001 [cited by applicant]
US 6263491B1 · Hunt · 2001 [cited by applicant]
US 6289505B1 · Goebel · 2001 [cited by applicant]
US 6314558B1 · Angel · 2001 [cited by examiner]
US 6381735B1 · Hunt · 2002 [cited by applicant]
US 6499137B1 · Hunt · 2002 [cited by applicant]
US 6622300B1 · Krishnaswamy · 2003 [cited by examiner]
US 6820258B1 · Fink · 2004 [cited by examiner]
US 6874140B1 · Shupak · 2005 [cited by examiner]
US 6957422B2 · Hunt · 2005 [cited by applicant]
US 6973646B1 · Bordawekar et al. · 2005 [cited by applicant]
US 7013469B2 · Smith et al. · 2006 [cited by applicant]
US 7240342B1 · Bharadwaj et al. · 2007 [cited by applicant]
US 7316010B1 · Daynes et al. · 2008 [cited by applicant]
US 7730459B2 · Gates et al. · 2010 [cited by applicant]
US 7757221B2 · Zheng et al. · 2010 [cited by applicant]
US 8645934B2 · Fontenot et al. · 2014 [cited by applicant]
US 8789032B1 · Li · 2014 [cited by examiner]
US 8959477B2 · Mueller · 2015 [cited by examiner]
US 9117071B2 · Beretta · 2015 [cited by examiner]
US 9223554B1 · Lawson · 2015 [cited by applicant]
US 9430200B1 · Trofin et al. · 2016 [cited by applicant]
US 9477461B1 · Korotaev · 2016 [cited by applicant]
US 10019244B1 · Rocamora · 2018 [cited by examiner]
US 10203968B1 · Lawson · 2019 [cited by applicant]
US 10346287B1 · Dillon · 2019 [cited by applicant]
US 10713024B2 · Jaeger et al. · 2020 [cited by applicant]
US 11061653B2 · Fang · 2021 [cited by examiner]
US 11550903B1 · Epstein · 2023 [cited by applicant]
US 11822908B1 · Hatti · 2023 [cited by examiner]
US 20050235269A1 · K N et al. · 2005 [cited by applicant]
US 20190114401A1 · De et al. · 2019 [cited by applicant]
US 20230244457A1 · Bookstein · 2023 [cited by applicant]
WO WO2017205118 · 2017 [cited by applicant]
Anand et al, “A Compiler-level Intermediate Representation based Binary Analysis and Rewriting System”, ACM, pp. 1-14 (Year: 2013). [cited by examiner]
Krichner et al, “bin2llvm: Analysis of Binary Programs Using LLVM Intermediate Representation”, ACM, pp. 1-7 (Year: 2017). [cited by examiner]
Mennie et al, “Information Flow Certification Using an Intermediate Code Program Representation”, IEEE, pp. 1-14 (Year: 1981). [cited by examiner]
Whaley, “Partial Method Compilation using Dynamic Profile Information”, ACM, pp. 1-14 (Year: 2001). [cited by examiner]
Communication Pursuant to Article 94(3) EPC Dated Jul. 5, 2024 From the European Patent Office Re. Application No. 23154283.8. (5 Pages). [cited by applicant]
Communication Pursuant to Article 94(3) EPC Dated Mar. 25, 2025 From the European Patent Office Re. Application No. 23154283.8 (7 Pages). [cited by applicant]
Interview Summary Dated Aug. 8, 2023 from the US Patent and Trademark Office Re. U.S. Appl. No. 17/588,430. (2 pages). [cited by applicant]
Notice of Allowance Dated Sep. 25, 2023 together with Interview Summary from the US Patent and Trademark Office Re. U.S. Appl. No. 17/588,430. (9 pages). [cited by applicant]
Official Action Dated Jun. 9, 2023 from the US Patent and Trademark Office Re. U.S. Appl. No. 17/588,430. (14 pages). [cited by applicant]
Official Action Dated Jan. 23, 2023 from the US Patent and Trademark Office Re. U.S. Appl. No. 17/588,430. (22 pages). [cited by applicant]
Supplementary European Search Report and the European Search Opinion Dated Jun. 20, 2023 From the European Patent Office Re. Application No. 23154283.8. (10 Pages). [cited by applicant]
Anand et al. “A Compiler-Level Intermediate Representation Based Binary Analysis and Rewriting System”, ACM Digital Library, 295-308, Apr. 15, 2013. [cited by applicant]
Brandolese et al. “Software Energy Estimation Based on Statistical Characterization of Intermediate Compilation Code”, IEEE/ACM International Symposium on Low Power Electronics and Design, 333-338, 2011. [cited by applicant]
Cesare et al. “Wire—A Formal Intermediate Language for Binary Analysis”, IEEE International Conference on Trust, Security and Privacy in Computing and Communications, 515-524, 2012. [cited by applicant]
Gong et al. “Iterative Quantization: A Procrustean Approach to Lerning Binary Codes for Large-Scale Image Retrieval”, IEEE Transactions on Pattern Analysis and Machine Intelligence, 35(12): 2916-2929, Dec. 2013. [cited by applicant]
Mao et al. “Cross-Language Binary-Source Code Matching Based on Rust and Intermediate Representation”, IEEE the 3rd International Conference on Computer Communication and Artificial Intelligence, 195-199, 2023. [cited by applicant]
Sæbjørnsen et al. “Detecting Code Clones in Binary Executables”, ISSTA '09: Proceedings of the eighteenth international symposium on Software testing and analysis, 177-128, Jul. 19, 2009. [cited by applicant]