Pixel and display device including the same
A pixel includes a light emitting element, a driving transistor configured to control a driving current provided to the light emitting element, and an initialization transistor configured to provide a first initialization voltage to a gate of the driving transistor, and turned on in response to an initialization gate signal. A voltage level of the first initialization voltage in a blank period of a low-frequency driving mode is higher than a voltage level of the first initialization voltage in the blank period of a high-frequency driving mode.
1. A pixel comprising:
a light emitting element;
a driving transistor configured to control a driving current provided to the light emitting element; and
an initialization transistor configured to provide a first initialization voltage to a gate of the driving transistor, and turned on in response to an initialization gate signal,
wherein a voltage level of the first initialization voltage in a blank period of a low-frequency driving mode is higher than a voltage level of the first initialization voltage in the blank period of a high-frequency driving mode.
2. The pixel of claim 1 , wherein a voltage level of the first initialization voltage in an active period of the low-frequency driving mode is substantially equal to a voltage level of the first initialization voltage in the active period of the high-frequency driving mode.
3. The pixel of claim 1 , wherein the voltage level of the first initialization voltage in the blank period of the low-frequency driving mode is higher than a voltage level of the first initialization voltage in an active period of the low-frequency driving mode.
4. The pixel of claim 1 , wherein a difference between the voltage level of the first initialization voltage in the blank period of the low-frequency driving mode and the voltage level of the first initialization voltage in the blank period of the high-frequency driving mode is substantially equal to a maximum voltage increase amount of the initialization gate signal in the blank period of the low-frequency driving mode.
5. The pixel of claim 1 , wherein a Vgs voltage of the initialization transistor in the blank period of the low-frequency driving mode (where a Vgs voltage is a voltage level difference between a gate and a source) is substantially equal to a Vgs voltage of the initialization transistor in the blank period of the high-frequency driving mode.
6. The pixel of claim 1 , wherein a driving frequency of the low-frequency driving mode is less than or equal to 60 Hz, and
a driving frequency of the high-frequency driving mode is greater than or equal to 120 Hz.
7. The pixel of claim 1 , wherein the driving transistor includes a PMOS transistor, and
the initialization transistor includes an NMOS transistor.
8. The pixel of claim 1 , wherein the driving transistor includes a polycrystalline silicon transistor, and
the initialization transistor includes an oxide semiconductor transistor.
9. The pixel of claim 1 , further comprising:
a write transistor configured to provide a data signal to a source of the driving transistor, and turned on in response to a write gate signal;
a compensation transistor connected between a drain and the gate of the driving transistor, and turned on in response to a compensation gate signal;
a first emission control transistor connected between a power supply voltage line configured to transmit a first power supply voltage and the source of the driving transistor, and turned off in response to an emission signal;
a second emission control transistor connected between the drain of the driving transistor and a first electrode of the light emitting element, and turned off in response to the emission signal;
a bypass transistor configured to provide a second initialization voltage to the first electrode of the light emitting element, and turned on in response to a bypass gate signal; and
a storage capacitor connected between the gate of the driving transistor and the power supply voltage line.
10. The pixel of claim 9 , wherein each of the write transistor, the first emission control transistor, the second emission control transistor, and the bypass transistor includes a PMOS transistor, and
the compensation transistor includes an NMOS transistor.
11. The pixel of claim 9 , wherein each of the write transistor, the first emission control transistor, the second emission control transistor, and the bypass transistor includes a polycrystalline silicon transistor, and
the compensation transistor includes an oxide semiconductor transistor.
12. The pixel of claim 9 , further comprising a bias transistor configured to provide a bias voltage to the source or the drain of the driving transistor, and turned on in response to the bypass gate signal.
13. A display device comprising:
a display panel including a plurality of pixels;
a gate driver configured to provide an initialization gate signal to the pixels; and
a power supply configured to provide a first initialization voltage to the pixels,
wherein each of the pixels includes:
a light emitting element;
a driving transistor configured to control a driving current provided to the light emitting element; and
an initialization transistor configured to provide the first initialization voltage to a gate of the driving transistor, and turned on in response to the initialization gate signal, and
wherein a voltage level of the first initialization voltage in a blank period of a low-frequency driving mode is higher than a voltage level of the first initialization voltage in the blank period of a high-frequency driving mode.
14. The display device of claim 13 , wherein a voltage level of the first initialization voltage in an active period of the low-frequency driving mode is substantially equal to a voltage level of the first initialization voltage in the active period of the high-frequency driving mode.
15. The display device of claim 13 , wherein the voltage level of the first initialization voltage in the blank period of the low-frequency driving mode is higher than a voltage level of the first initialization voltage in an active period of the low-frequency driving mode.
16. The display device of claim 13 , wherein a difference between the voltage level of the first initialization voltage in the blank period of the low-frequency driving mode and the voltage level of the first initialization voltage in the blank period of the high-frequency driving mode is substantially equal to a maximum voltage increase amount of the initialization gate signal in the blank period of the low-frequency driving mode.
17. The display device of claim 13 , wherein a Vgs voltage of the initialization transistor in the blank period of the low-frequency driving mode (where a Vgs voltage is a voltage level difference between a gate and a source) is substantially equal to a Vgs voltage of the initialization transistor in the blank period of the high-frequency driving mode.
18. The display device of claim 13 , wherein a driving frequency of the low-frequency driving mode is less than or equal to 60 Hz, and
a driving frequency of the high-frequency driving mode is greater than or equal to 120 Hz.
19. The display device of claim 13 , wherein the display panel includes a main display area and a sub-display area, and
a number of the pixels for each line of the main display area is greater than a number of the pixels for each line of the sub-display area.
20. The display device of claim 19 , wherein the sub-display area includes a first sub-display area and a second sub-display area, which protrude from the main display area, and
a notch area is formed between the first sub-display area and the second sub-display area.