IP Library Granted Patent US 11,824,461
Granted Patent B2
US 11,824,461 · App. 17/357,248 · Granted Nov 21, 2023

MMC submodules scale-up methodology for MV and HV power conversion system applications

Inventors: Subhashish Bhattacharya (Raleigh, NC); Mohammed Alharbi (Raleigh, NC)
Assignee: NORTH CAROLINA STATE UNIVERSITY
H02M7/4835H02M7/4833H02M1/0067H02M1/143H02M1/325H02M7/537
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Quick Facts
Patent No.
US 11,824,461
App. No.
17/357,248
Granted
Nov 21, 2023
Kind
B2
Abstract

Various examples are provided related to modular multilevel converter (MMC) scale-up control methodologies which can be applied for MV and HV DC applications. In one example, an MMC includes first and second legs each with submodule (SM) groups connected in series, where each SM group includes a plurality of SMs; local group controllers that can control a corresponding SM group; and a central controller that can control output voltage of the MMC via the local group controllers. The local group controllers can provide capacitor voltage balancing (CVB) control of corresponding SM groups.

Claims (14)

1. A modular multilevel converter (MMC), comprising:

first and second legs each comprising a plurality of submodule (SM) groups connected in series, where each SM group comprises a plurality of SMs;

local group controllers configured to control a corresponding SM group of the plurality of SM groups, where individual local group controllers are configured to provide capacitor voltage balancing (CVB) control of the corresponding SM group, wherein the CVB control by the local group controllers adjusts a number of SMs of the corresponding SM group that are connected in series, wherein the number of SMs is based upon a total harmonic distortion (THD) limit; and

a central controller communicatively coupled to the local group controllers, the central controller configured to control output voltage of the MMC via the local group controllers.

2. The MMC of claim 1 , wherein the central controller specifies a number of SM groups used to achieve a specified voltage level.

3. The MMC of claim 2 , wherein the number of SM groups is determined based at least in part upon DC bus voltage and SM capacitor voltages.

4. The MMC of claim 3 , wherein the local group controllers identify the SM capacitor voltages of the corresponding SM groups.

5. The MMC of claim 1 , wherein the first and second legs each comprise a series-connected inductor.

6. The MMC of claim 1 , wherein the MMC is configured to implement nearest level modulation (NLM) or pulse width modulation (PWM).

7. The MMC of claim 1 , wherein the central controller is configured to implement circulating current suppression control for the MMC.

8. The MMC of claim 1 , wherein the local group controllers are configured to generate gate signals for the corresponding SM group.

9. The MMC of claim 8 , wherein the gate signals are provided based upon a comparison of a difference voltage between a maximum capacitor voltage and a minimum capacitor voltage of the SM group to a defined value.

10. The MMC of claim 9 , wherein the gate signals are provided if the difference voltage is greater than the defined value.

11. The MMC of claim 9 , wherein the gate signals are provided if a number of specified SMs is adjusted.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: BHATTACHARYA, SUBHASHISH; ALHARBI, MOHAMMED
To: NORTH CAROLINA STATE UNIVERSITY
Reel/Frame 057067/0083 →
Continuity (2)
Provisional Application 63043308 · Jun 24, 2020
Related Publication 20210408937A1 · Dec 30, 2021
Cited By (4)
US 12,542,440 US 12,620,886 US 12,640,568 US 12,726,025