Display apparatus having bridge electrode electrically connecting lower electrode pattern layer and semiconductor layer of transistor
A display apparatus includes a thin-film transistor located in a display area and including a semiconductor layer and a gate electrode; a storage capacitor located in the display area and including a first capacitor plate, a second capacitor plate, and a dummy capacitor plate overlapping each other; a light-emitting diode electrically connected to the thin-film transistor and the storage capacitor and including a pixel electrode, an interlayer, and a counter electrode; a pad located in a surrounding area adjacent to the display area; a lower electrode pattern layer disposed below the semiconductor layer, at least a portion of the lower electrode pattern layer overlapping the semiconductor layer; and a bridge electrode electrically connecting the semiconductor layer to the lower electrode pattern layer.
1. A display apparatus comprising:
a switching thin-film transistor located in a display area and including a semiconductor layer and a gate electrode;
a storage capacitor located in the display area and including a dummy capacitor plate, a first capacitor plate on and spaced apart from the dummy capacitor plate and electrically connected to the semiconductor layer, and a second capacitor plate on and spaced apart from the dummy capacitor plate, the dummy capacitor plate, the first capacitor plate, and the second capacitor plate overlapping each other, the second capacitor plate electrically connected to a driving voltage line;
a light-emitting diode electrically connected to the switching thin-film transistor and the storage capacitor and including a pixel electrode, an interlayer, and a counter electrode;
a pad located in a surrounding area adjacent to the display area;
a lower electrode pattern layer disposed below the semiconductor layer, at least a portion of the lower electrode pattern layer overlapping the semiconductor layer; and
a bridge electrode electrically connecting the semiconductor layer to the lower electrode pattern layer, wherein
the dummy capacitor plate and the semiconductor layer comprise a same material.
2. The display apparatus of claim 1 , wherein the first capacitor plate and the gate electrode comprise a same material.
3. The display apparatus of claim 1 , wherein:
the storage capacitor includes a third capacitor plate disposed below the first capacitor plate and the dummy capacitor plate, the third capacitor plate being electrically connected to the second capacitor plate, and
the third capacitor plate overlaps the dummy capacitor plate, the first capacitor plate, and the second capacitor plate.
4. The display apparatus of claim 1 , wherein
the pad comprises a first pad electrode and a second pad electrode electrically connected to the first pad electrode, and
the first pad electrode and the bridge electrode comprise a same material.
5. The display apparatus of claim 4 , wherein the second pad electrode and the gate electrode or the lower electrode pattern layer comprise a same material.
6. The display apparatus of claim 1 , further comprising:
a driving thin-film transistor located in the display area and including a second gate electrode, the second gate electrode being electrically connected to the first capacitor plate and the semiconductor layer.
7. A display apparatus comprising:
a thin-film transistor located in a display area and including a semiconductor layer and a gate electrode;
a storage capacitor located in the display area and including a first capacitor plate, a second capacitor plate, and a dummy capacitor plate overlapping each other;
a light-emitting diode electrically connected to the thin-film transistor and the storage capacitor and including a pixel electrode, an interlayer, and a counter electrode;
a pad located in a surrounding area adjacent to the display area;
a lower electrode pattern layer disposed below the semiconductor layer, at least a portion of the lower electrode pattern layer overlapping the semiconductor layer; and
a bridge electrode electrically connecting the semiconductor layer to the lower electrode pattern layer, wherein
the semiconductor layer comprises:
a channel region overlapping the gate electrode; and
a source region and a drain region respectively disposed on opposite sides of the channel region, and
the lower electrode pattern layer comprises:
a source electrode electrically connected to the source region of the semiconductor layer; and
a drain electrode electrically connected to the drain region of the semiconductor layer.
8. The display apparatus of claim 7 , further comprising:
a passivation layer overlapping the gate electrode,
wherein the bridge electrode is disposed on the passivation layer, and comprises:
a first bridge electrode electrically connecting the source electrode of the lower electrode pattern to the source region of the semiconductor layer; and
a second bridge electrode electrically connecting the drain electrode of the lower electrode pattern to the drain region of the semiconductor layer.
9. The display apparatus of claim 8 , further comprising:
a planarization insulating layer disposed on the bridge electrode,
wherein the pixel electrode is electrically connected to either the first bridge electrode or the second bridge electrode through a contact hole formed in the planarization insulating layer.
10. The display apparatus of claim 8 , wherein the first bridge electrode or the second bridge electrode comprises the pixel electrode.