IP Library › Granted Patent US 11,835,554
Granted Patent B2
US 11,835,554 · App. 17/129,113 · Granted Dec 5, 2023

Current sensing circuitry

Inventors: Dipankar Nag (Newbury, GB); Peter Hsu (Edinburgh, GB); Kapil R. Sharma (Edinburgh, GB); Gordon J. Bates (Edinburgh, GB); Simon R. Foster (Reading, GB); Mark J. McCloy-Stevens (Edinburgh, GB)
Assignee: Cirrus Logic Inc.
G01R19/2509H03F3/45475G01R19/0053H03F2200/129H03F2200/171H03F2203/45116
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,835,554
App. No.
17/129,113
Granted
Dec 5, 2023
Kind
B2
Abstract

The present application relates to current sensing circuitry ( 100 ) that comprises a differential amplifier ( 110 ) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry ( 100 ) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

Claims (36)

1. Current sensing circuitry, comprising:

a differential amplifier comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal;

a first current source;

a second current source; and

a switch network operable in:

a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and

a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

2. Current sensing circuitry according to claim 1 wherein the differential amplifier comprises a differential chopper amplifier.

3. Current sensing circuitry according to claim 2 wherein the differential chopper amplifier is configured to be chopped between a first chopping configuration and a second chopping configuration at a first chopping frequency and said switch network is operable to chop between the first phase and the second phase at a second chopping frequency.

4. Current sensing circuitry according to claim 3 wherein the first chopping frequency and the second chopping frequency are the same frequency as one another.

5. Current sensing circuitry according to claim 4 wherein the first chopping frequency and the second chopping frequency are derived from a common clock signal.

6. Current sensing circuitry according to claim 4 wherein the first chopping frequency and the second chopping frequency are synchronous and separated by a delay.

7. Current sensing circuitry according to claim 1 wherein the first current source and the second current source are configured to generate equal bias currents to one another.

8. Current sensing circuitry according to claim 1 implemented as an integrated circuit.

9. Current sensing circuitry according to claim 1 wherein the differential amplifier comprises a differential-to-single-ended amplifier.

10. Current sensing circuitry, comprising:

a first stage comprising:

a differential amplifier comprising first and second inputs configured to sense a current across a sense resistance, and, an output configured to output an output current signal;

first and second current sources; and

a current source chopper comprising a switch network operable to chop the first and second current sources between the first input and the output;

a second stage comprising a current-to-voltage converter configured to receive the measurement current and output a voltage signal representative of the current across the sense resistance; and

a third stage comprising an analogue-to-digital converter (ADC) configured to convert the voltage signal to a digital output voltage signal.

11. Current sensing circuitry according to claim 10 wherein the current-to-voltage converter comprises a trans-impedance amplifier (TIA).

12. Current sensing circuitry according to claim 11 wherein the TIA comprises an anti-aliasing filter.

13. Current sensing circuitry according to claim 11 wherein the ADC is configured to receive a first reference voltage to drive the ADC, wherein the TIA comprises a first TIA input configured to receive the measurement current and a second TIA input configured to receive a second reference voltage derived from the first reference voltage.

14. Current sensing circuitry according to claim 10 further comprising a low-pass filter and wherein the current source chopper is operable to chop the first and second current sources between the first input and the output at a chopping frequency and a cut-off frequency of the low-pass filter is less than the chopping frequency of the current source chopper.

15. Current sensing circuitry according to claim 14 wherein the ADC comprises the low-pass filter.

16. Current sensing circuitry according to claim 10 wherein the differential amplifier comprises a differential chopper amplifier.

17. Current sensing circuitry according to claim 16 wherein the differential chopper amplifier is operable to repeatedly swap between a first chopper configuration and a second chopper configuration at a first chopping frequency; and

wherein the current source chopper is operable to chop the first and second level shifting current sources between the first input and the output based at a second chopping frequency; and

wherein the first chopping frequency and the second chopping frequency are configured to be at the same frequency as one another.

18. Current sensing circuitry according to claim 17 wherein the first chopping frequency and the second chopping frequency have a predetermined relationship to a sampling frequency of the ADC.

19. Current sensing circuitry according to claim 10 wherein the differential amplifier comprises a differential-to-single-ended amplifier.

20. Current sensing circuitry, comprising:

a differential-to-single-ended amplifier configured to sense a current across a sense resistance and output a current sense signal; and

first and second current sources configured to provide level shifting at an input of the differential-to-single-ended amplifier and at an output of the differential-to-single-ended amplifier, wherein the first and second current sources are chopped between the input of the differential-to-single-ended amplifier and the output of the differential-to-single-ended amplifier.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2023
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC, INC.
Reel/Frame 064841/0974 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2021
From: NAG, DIPANKAR; HSU, PETER; SHARMA, KAPIL R.; BATES, GORDON J.; FOSTER, SIMON R.; MCCLOY-STEVENS, MARK J.
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 055052/0205 →
Continuity (2)
Provisional Application 63014303 · Apr 23, 2020
Related Publication 20210333310A1 · Oct 28, 2021