In-memory database (IMDB) acceleration through near data processing

1. An accelerator, comprising:

an on-chip memory including a first memory bank and a second memory bank, the first memory bank configured to store a data from a database, the data including a first value and a second value; and

a computational engine to execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory,

wherein the on-chip memory is configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.

2. The accelerator according to claim 1 , wherein the database is stored in an accelerator memory of the accelerator.

3. The accelerator according to claim 1 , wherein the on-chip memory is configured to load the data from an output buffer of the accelerator.

4. The accelerator according to claim 3 , wherein:

the on-chip memory is configured to store an uncompressed data from the database; and

the accelerator further comprises an input buffer storing a compressed data.

5. The accelerator according to claim 4 , further comprising a decompressor to generate the uncompressed data from the compressed data.

6. The accelerator according to claim 1 , wherein the first memory bank includes a first memory unit and a second memory unit, the first memory unit storing the data and the second memory unit storing the data.

7. The accelerator according to claim 1 , further comprising an output memory to store a result of the command.

8. The accelerator according to claim 7 , wherein the accelerator is configured to transfer the result of the command from the output memory to a page cache of a host processor.

9. A system, comprising:

a host processor;

a host memory coupled to the host processor; and

an accelerator, including:

an on-chip memory including a first memory bank and a second memory bank, the first memory bank configured to store a data from a database, the data including a first value and a second value; and

a computational engine to execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory,

wherein the on-chip memory is configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.

10. The system according to claim 9 , wherein the database is stored in an accelerator memory of the accelerator.

11. A system according to claim 9 , wherein the first memory bank includes a first memory unit and a second memory unit, the first memory unit storing the data and the second memory unit storing the data.

12. A method, comprising:

loading a data from a database into a first memory bank of an on-chip memory of an accelerator;

executing, in parallel, a command on a first value in the data in the first memory bank and a second value in the data of the first memory bank to produce a result; and

loading a second data from the database into a second memory bank of the on-chip memory in parallel with executing the command on the first value in the data and the second value in the data.

13. The method according to claim 12 , wherein loading the data from the database into the first memory bank of the on-chip memory of the accelerator includes copying the data from an accelerator memory into the on-chip memory.

14. The method according to claim 12 , wherein loading the data from the database into the first memory bank of the on-chip memory of the accelerator includes copying the data from an output buffer of the accelerator into the on-chip memory.

15. The method according to claim 12 , wherein loading the data from the database into the first memory bank of the on-chip memory of the accelerator includes:

loading a compressed data from the database into the accelerator; and

decompressing the compressed data to generate the data.

16. The method according to claim 15 , wherein loading the compressed data from the database includes loading the compressed data from the database into an input buffer of the accelerator.

17. The method according to claim 15 , wherein decompressing the compressed data to generate the data includes storing the data in an output buffer of the accelerator.

18. The method according to claim 12 , further comprising storing the result in an output memory.

19. The method according to claim 18 , further comprising copying the result from the output memory into a page cache of a host processor.

20. The method according to claim 12 , wherein:

loading the data from the database into the first memory bank of the on-chip memory the accelerator includes:

loading the data from the database into a first memory unit of the first memory bank of the accelerator; and

loading the data from the database into a second memory unit of the first memory bank of the accelerator; and

executing, in parallel, the command on the first value in the data in the first memory bank and the second value in the data of the first memory bank to produce the result includes:

executing the command on the first value in the data in the first memory unit;

executing the command on the second value in the data in the second memory unit; and

producing the result based at least in part on executing the command on the first value in the data in the first memory unit and executing the command on the second value in the data in the second memory unit.