IP Library › Granted Patent US 11,836,461
Granted Patent B2
US 11,836,461 · App. 17/425,055 · Granted Dec 5, 2023

Arithmetic apparatus, multiply-accumulate system, and setting method

Inventor: Hiroshi Yoshida (Kanagawa, JP)
Assignee: Sony Group Corporation
G06F7/523G06F7/50G06F7/5443G06G7/14G06G7/16G06N3/065
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Quick Facts
Patent No.
US 11,836,461
App. No.
17/425,055
Granted
Dec 5, 2023
Kind
B2
Abstract

An arithmetic apparatus includes input lines and multiply-accumulate devices. An electrical signal for an input value is input into each of the input lines within a predetermined input period. Multiplication units include a positive weight multiplication unit that generates a positive weight charge for a product value obtained by multiplying the input value by a positive weight value and/or a negative weight multiplication unit that generates a negative weight charge for a product value obtained by multiplying the input value by a negative weight value. They are configured such that a positive weight ratio that is a ratio of a sum total of the positive weight values to a sum total of absolute values of the weight values is any ratio of 0% to 100%. An output unit of the multiply-accumulate device accumulates the generated weight charges to output a multiply-accumulate signal representing a sum of the product values.

Claims (62)

1. An arithmetic apparatus, comprising:

a plurality of input lines into each of which an electrical signal corresponding to an input value is input within a predetermined input period; and

a plurality of multiply-accumulate devices each including

a plurality of multiplication circuits that each generates, on a basis of the electrical signal input into each of the plurality of input lines, a charge corresponding to a product value obtained by multiplying the input value by a weight value, and

an output circuit that accumulates a charge corresponding to the product value generated by each of the plurality of multiplication circuits and outputs, on a basis of the accumulated charge, a multiply-accumulate signal representing a sum of the product values, in which

the plurality of multiplication circuits includes at least one of a positive weight multiplication circuit that generates a positive weight charge corresponding to a product value obtained by multiplying the input value by a positive weight value or a negative weight multiplication circuit that generates a negative weight charge corresponding to a product value obtained by multiplying the input value by a negative weight value, and is configured such that a positive weight ratio that is a ratio of a sum total of the positive weight values to a sum total of absolute values of the positive and negative weight values is any ratio of 0% to 100%, and

the output circuit accumulates at least one of the positive weight charge generated by the positive weight multiplication circuit or the negative weight charge generated by the negative weight multiplication circuit, to thereby output the multiply-accumulate signal, wherein

a duration of the predetermined input period is set on a basis of a distribution of respective positive weight ratios of the plurality of multiply-accumulate devices.

2. The arithmetic apparatus according to claim 1 , wherein

the electrical signal corresponding to the input value is a pulse signal having a duration of an ON time with respect to the predetermined input period, the duration corresponding to the input value.

3. The arithmetic apparatus according to claim 1 , wherein

the duration of the predetermined input period is set on a basis of at least one of an average or a variance of the respective positive weight ratios.

4. The arithmetic apparatus according to claim 1 , wherein

the duration of the predetermined input period is set to be longer as the respective positive weight ratios are distributed closer to a value of 50%.

5. The arithmetic apparatus according to claim 1 , wherein

the duration of the predetermined input period is set to be longer as the average of the respective positive weight ratios is closer to 50%.

6. The arithmetic apparatus according to claim 1 , wherein

the duration of the predetermined input period is, in a case where the average of the respective positive weight ratios is approximately 50%, set to be longer as the variance of the respective positive weight ratios is smaller.

7. The arithmetic apparatus according to claim 1 , wherein

the determination circuit includes

a plurality of determination multiplication circuits that each generates, on a basis of the electrical signal input into each of the plurality of input lines, a positive weight charge corresponding to a product value obtained by multiplying the input value by a positive weight value and a negative weight charge corresponding to a product value obtained by multiplying the input value by a negative weight value having an absolute value equal to the positive weight value,

a determination circuit output that outputs a determination signal on a basis of a charge corresponding to a difference between the total number of positive weight charges respectively generated by the plurality of determination multiplication circuits and the total number of negative weight charges respectively generated by the plurality of determination multiplication circuits, and

a determination circuit for determining a number of respective multiply-accumulate signals output from the plurality of multiply-accumulate devices, which are smaller than the determination signal.

8. The arithmetic apparatus according to claim 7 , wherein

the determination circuit includes a positive charge output line and a negative charge output line,

a plurality of determination multiplication circuits is provided to be associated with the plurality of input lines, and

each of the plurality of determination multiplication circuits includes a common resistor that is connected to each of a portion between an associated input line of the plurality of input lines and the positive charge output line and a portion between an associated input line of the plurality of input lines and the negative charge output line and has a non-linear characteristic.

9. The arithmetic apparatus according to claim 1 , wherein

the output circuit includes an accumulation circuit that accumulates at least one of the positive weight charge generated by the positive weight multiplication circuit or the negative weight charge generated by the negative weight multiplication circuit and performs threshold determination on a voltage, which is retained by the accumulation circuit, with a predetermined threshold value, to thereby output the multiply-accumulate signal representing the sum of the product values.

10. The arithmetic apparatus according to claim 9 , wherein

the accumulation circuit includes a positive charge accumulation circuit capable of accumulating the positive weight charge generated by the positive weight multiplication circuit and a negative charge accumulation circuit capable of accumulating the negative weight charge generated by the negative weight multiplication circuit, and

the output circuit performs the threshold determination with the predetermined threshold value on each of the positive charge accumulation circuit and the negative charge accumulation circuit, to thereby output the multiply-accumulate signal.

11. The arithmetic apparatus according to claim 9 , wherein

the predetermined threshold value is set on a basis of the duration of the predetermined input period.

12. The arithmetic apparatus according to claim 1 , wherein

the positive weight value and an absolute value of the negative weight value are fixed to a same value, and

the positive weight ratio is a ratio of the number of positive weight multiplication circuits to the number of multiplication circuits.

13. The arithmetic apparatus according to claim 1 , wherein

each of the plurality of multiply-accumulate devices includes a positive charge output line and a negative charge output line,

the plurality of multiplication circuits is provided to be associated with the plurality of input lines,

the positive weight multiplication circuit includes a resistor that is connected between an associated input line of the plurality of input lines and the positive charge output line, defines the positive weight value, and has a non-linear characteristic, and outputs a positive weight charge corresponding to the product value to the positive charge output line, and

the negative weight multiplication circuit includes a resistor that is connected between an associated input line of the plurality of input lines and the negative charge output line, defines the negative weight value, and has a non-linear characteristic, and outputs a negative weight charge corresponding to a product value to the negative charge output line.

14. The arithmetic apparatus according to claim 13 , wherein

the resistor of the positive weight multiplication circuit and the resistor of the negative weight multiplication circuit have a same resistance value, and

the positive weight ratio is a ratio of the number of resistors of the positive weight multiplication circuits to the total number of resistors.

15. The multiply-accumulate device according to claim 13 , wherein

the resistor is a fixed resistance element, a variable resistance element, or an MOS transistor that operates in a sub-threshold region.

16. A multiply-accumulate system, comprising:

a plurality of input lines into each of which an electrical signal corresponding to an input value is input within a predetermined input period;

a plurality of analog circuits each including

a plurality of multiplication circuits that each generates, on a basis of the electrical signal input into each of the plurality of input lines, a charge corresponding to a product value obtained by multiplying the input value by a weight value,

an output circuit that accumulates a charge corresponding to the product value generated by each of the plurality of multiplication circuits and outputs, on a basis of the accumulated charge, a multiply-accumulate signal representing a sum of the product values, in which

the plurality of multiplication circuits includes at least one of a positive weight multiplication circuit that generates a positive weight charge corresponding to a product value obtained by multiplying the input value by a positive weight value or a negative weight multiplication circuit that generates a negative weight charge corresponding to a product value obtained by multiplying the input value by a negative weight value, and is configured such that a positive weight ratio that is a ratio of a sum total of the positive weight values to a sum total of absolute values of the weight values is any ratio of 0% to 100%, and

the output circuit accumulates at least one of the positive weight charge generated by the positive weight multiplication circuit or the negative weight charge generated by the negative weight multiplication circuit, to thereby output the multiply-accumulate signal; and

a network circuit configured by connecting the plurality of analog circuits, wherein

a duration of the predetermined input period is set on a basis of a distribution of the respective positive weight ratios of the plurality of multiply-accumulate devices.

17. A setting method, comprising:

setting an input period for inputting an electrical signal into each of a plurality of input lines on a basis of a distribution of respective positive weight ratios of a plurality of multiply-accumulate devices each including

a plurality of multiplication circuits that each generates, on a basis of the electrical signal corresponding an input value that is input into each of the plurality of input lines, a charge corresponding to a product value obtained by multiplying the input value by a weight value,

an output circuit that accumulates a charge corresponding to the product value generated by each of the plurality of multiplication circuits and outputs, on a basis of the accumulated charge, a multiply-accumulate signal representing a sum of the product values, in which

the plurality of multiplication circuits includes at least one of a positive weight multiplication circuit that generates a positive weight charge corresponding to a product value obtained by multiplying the input value by a positive weight value or a negative weight multiplication circuit that generates a negative weight charge corresponding to a product value obtained by multiplying the input value by a negative weight value, and is configured such that a positive weight ratio that is a ratio of a sum total of the positive weight values to a sum total of absolute values of the positive and negative weight values is any ratio of 0% to 100%, and

the output circuit accumulates at least one of the positive weight charge generated by the positive weight multiplication circuit or the negative weight charge generated by the negative weight multiplication circuit, to thereby output the multiply-accumulate signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2021
From: YOSHIDA, HIROSHI
To: SONY GROUP CORPORATION
Reel/Frame 056946/0609 →
Priority Claims (1)
JP 2019-018104 · Feb 4, 2019 · national
Continuity (1)
Related Publication 20220100469A1 · Mar 31, 2022