IP Library › Granted Patent US 11,837,288
Granted Patent B2
US 11,837,288 · App. 17/470,867 · Granted Dec 5, 2023

Memory device

Inventor: Naoki Matsushita (Seoul, KR)
Assignee: Kioxia Corporation
G11C13/0069G11C13/004G11C13/0026G11C13/0028G11C13/0038
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Quick Facts
Patent No.
US 11,837,288
App. No.
17/470,867
Granted
Dec 5, 2023
Kind
B2
Abstract

According to one embodiment, a memory device includes: a memory cell including a memory element and a switching element; and a circuit that applies a first write pulse having a first polarity to the memory cell at the time of writing first data in the memory cell and applies a second write pulse having a second polarity different from the first polarity to the memory cell at the time of writing second data in the memory cell. The switching element has polarity dependence according to the first and second polarities.

Claims (58)

1. A memory device comprising:

a memory cell including a memory element and a switching element; and

a circuit that applies a first write pulse having a first polarity to the memory cell at the time of writing first data in the memory cell and applies a second write pulse having a second polarity different from the first polarity to the memory cell at the time of writing second data in the memory cell,

wherein

the switching element has polarity dependence according to the first and second polarities.

2. The memory device according to claim 1 , wherein

a first threshold voltage of the switching element when the first write pulse is applied is different from a second threshold voltage of the switching element when the second write pulse is applied.

3. The memory device according to claim 1 , wherein

when the first write pulse is indicated by “VwAPP”, the second write pulse is indicated by “VwPAP”, a ratio between the first and second write pulses is indicated by “a”, and the polarity dependence of the switching element is indicated by “b”, “a” has a relationship of Formula (1), and “b” has a relationship of Formula (2):

a =VwPAP/VwAPP  (1)

1< b<a 2   (2).

4. The memory device according to claim 3 , wherein

the “b” is equal to the “a”.

5. The memory device according to claim 1 , wherein

a first resistance value of the switching element when the first write pulse is applied is different from a second resistance value of the switching element when the second write pulse is applied.

6. The memory device according to claim 1 , wherein

the switching element includes a first electrode, a second electrode, and a first layer between the first electrode and the second electrode, and

a material of the first electrode is different from a material of the second electrode.

7. The memory device according to claim 1 , wherein

the polarity dependence of the switching element is set based on a condition for forming the switching element.

8. The memory device according to claim 1 , wherein

the memory element has polarity dependence according to the first and second polarities.

9. The memory device according to claim 1 , wherein

the memory element is a magnetoresistive effect element,

the magnetoresistive effect element includes:

a first magnetic layer having a variable magnetization direction;

a second magnetic layer having an invariable magnetization direction; and

an insulating layer between the first magnetic layer and the second magnetic layer, and

polarity dependence of the magnetoresistive effect element on the first and second write pulses is set by controlling at least one of a dimension of the first magnetic layer and a composition of a constituent element of the first magnetic layer.

10. A memory device comprising:

a memory cell including a memory element and a switching element; and

a circuit that applies a first write pulse having a first polarity to the memory cell at the time of writing first data in the memory cell and applies a second write pulse having a second polarity different from the first polarity to the memory cell at the time of writing second data in the memory cell,

wherein

a first resistance value of the switching element when the first write pulse is applied is different from a second resistance value of the switching element when the second write pulse is applied.

11. The memory device according to claim 10 , wherein

a first threshold voltage of the switching element when the first write pulse is applied is different from a second threshold voltage of the switching element when the second write pulse is applied.

12. The memory device according to claim 10 , wherein

the switching element has polarity dependence according to the first and second polarities.

13. The memory device according to claim 12 , wherein

when the first write pulse is indicated by “VwAPP”, the second write pulse is indicated by “VwPAP”, a ratio between the first and second write pulses is indicated by “a”, and the polarity dependence of the switching element is indicated by “b”, “a” has a relationship of Formula (1), and “b” has a relationship of Formula (2):

a =VwPAP/VwAPP  (1)

1< b<a 2   (2).

14. The memory device according to claim 13 , wherein

the “b” is equal to the “a”.

15. The memory device according to claim 10 , wherein

the switching element includes a first electrode, a second electrode, and a first layer between the first electrode and the second electrode, and

a material of the first electrode is different from a material of the second electrode.

16. The memory device according to claim 10 , wherein

a difference between the first resistance value and the second resistance value of the switching element is set based on a condition for forming the switching element.

17. The memory device according to claim 10 , wherein

the memory element has polarity dependence according to the first and second polarities.

18. The memory device according to claim 10 , wherein

the memory element is a magnetoresistive effect element,

the magnetoresistive effect element includes:

a first magnetic layer having a variable magnetization direction;

a second magnetic layer having an invariable magnetization direction; and

an insulating layer between the first magnetic layer and the second magnetic layer, and

polarity dependence of the magnetoresistive effect element on the first and second write pulses is set by controlling at least one of a dimension of the first magnetic layer and a composition of a constituent element of the first magnetic layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2021
From: MATSUSHITA, NAOKI
To: KIOXIA CORPORATION
Reel/Frame 057766/0481 →
Priority Claims (1)
JP 2021-040502 · Mar 12, 2021 · national
Continuity (1)
Related Publication 20220293176A1 · Sep 15, 2022
Cited By (1)
US 12,364,164