IP Library › Granted Patent US 11,848,159
Granted Patent B2
US 11,848,159 · App. 17/337,924 · Granted Dec 19, 2023

Multilayer capacitor and board for mounting the same

Inventor: Beom Joon Cho (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G4/2325H01G4/248H01G4/30H05K1/111H05K1/181H05K2201/10015
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Quick Facts
Patent No.
US 11,848,159
App. No.
17/337,924
Granted
Dec 19, 2023
Kind
B2
Abstract

A multilayer capacitor includes a capacitor body including a dielectric layer and a plurality of internal electrodes, and a pair of external electrodes disposed on opposing ends of the capacitor body and connected to exposed portions of the internal electrodes, wherein the external electrodes respectively include a conductive layer including a connection portion formed on one end surface of the capacitor body and connected to the internal electrode and a band portion extending from the connection portion to a portion of a neighboring surface of the capacitor body, a conductive resin layer covering a corner of the connection portion of the conductive layer and having a cutout portion so that a portion of an edge of the connection portion is exposed, and a plating layer covering the conductive layer and the conductive resin layer and contacting a portion of the conductive layer due to the cutout portion.

Claims (62)

1. A multilayer capacitor comprising:

a capacitor body including a dielectric layer and a plurality of internal electrodes; and

a pair of external electrodes disposed on opposing ends of the capacitor body and connected to exposed portions of the plurality of internal electrodes,

wherein the pair of external electrodes each include:

a conductive layer including a connection portion disposed on one end surface of the capacitor body and connected to a portion of the plurality of internal electrodes, and a band portion extending from the connection portion onto a portion of a neighboring surface of the capacitor body;

a conductive resin layer disposed to cover a corner of the connection portion of the conductive layer and having a cutout portion through which a portion of an edge of the conductive layer at which the band portion extends from the connection portion is exposed; and

a plating layer disposed to cover the conductive layer and the conductive resin layer and contacting a portion of the conductive layer through the cutout portion,

wherein the cutout portion extends to an outermost boundary of the conductive resin layer in a direction parallel to the one end surface,

wherein the cutout portion is located at a center of the conductive resin layer so that a center of the conductive layer is exposed,

wherein the cutout portion extends to be elongated from the center of the conductive resin layer such that a portion of a first edge of the conductive layer or a portion of a second edge of the conductive layer is exposed to be in contact with the plating layer, the first and second edges of the conductive layer opposing each other, and

wherein a length of the exposed portion of the first or second edge of the conductive layer is smaller than a length of the cutout portion located at the center of the conductive resin layer.

2. The multilayer capacitor of claim 1 , wherein the capacitor body includes first and second surfaces opposing each other in a first direction, third and fourth surfaces connecting the first and second surfaces to each other and opposing each other in a second direction, and fifth and sixth surfaces connecting the first and second surfaces, connecting the third and fourth surfaces to each other and opposing each other in a third direction, and

wherein the plurality of internal electrodes include first and second internal electrodes exposed through the third and fourth surfaces, respectively.

3. The multilayer capacitor of claim 2 , wherein the cutout portion extends in the third direction to expose the portion of the first or second edge of the conductive layer respectively in contact with the fifth or sixth surface of the capacitor body.

4. The multilayer capacitor of claim 2 , wherein the cutout portion extends in the third direction to expose both the portion of the first edge of the conductive layer in contact with the fifth surface of the capacitor body and the portion of the second edge of the conductive layer in contact with the sixth surface of the capacitor body.

5. The multilayer capacitor of claim 2 , wherein the cutout portion extends in the first direction to expose a portion of an edge of the conductive layer in contact with the first or second surface of the capacitor body.

6. The multilayer capacitor of claim 2 , wherein the cutout portion extends in the first direction to expose both a portion of an edge of the conductive layer in contact with the first surface of the capacitor body and a portion of an edge of the conductive layer in contact with the second surface of the capacitor body.

7. The multilayer capacitor of claim 2 , wherein the cutout portion extends in the first direction to expose a portion of an edge of the conductive layer in contact with the first surface of the capacitor body and a portion of an edge of the conductive layer in contact with the second surface of the capacitor body, and

the cutout portion extends in the third direction to expose both the portion of the first edge of the conductive layer in contact with the fifth surface of the capacitor body and the portion of the second edge of the conductive layer in contact with the sixth surface of the capacitor body.

8. The multilayer capacitor of claim 2 , wherein

the cutout portion extends to have a cross (+) shape when viewed from one cross-section of the capacitor.

9. The multilayer capacitor of claim 1 , wherein

the conductive resin layer includes metal powder particles and a resin.

10. The multilayer capacitor of claim 9 , wherein

the metal powder particles have a spherical shape or a flake shape.

11. The multilayer capacitor of claim 1 , wherein

the plating layer includes a nickel plating layer covering the conductive layer and the conductive resin layer and a tin (Sn) plating layer covering the nickel plating layer.

12. A board for mounting a multilayer capacitor comprising:

a substrate having a pair of electrode pads disposed to be spaced apart from each other on one surface of the substrate; and

the multilayer capacitor of claim 1 mounted on the pair of electrode pads, wherein the pair of the external electrodes are connected to the pair of electrode pads, respectively.

13. The multilayer capacitor of claim 1 , wherein the dielectric layer and plurality of internal electrodes are arranged in a stacking direction, and

wherein the cutout portion includes a first portion and a second portion each linearly extending in a width direction of the capacitor body, the first portion having a length in the stacking direction which is greater than a length of the second portion in the stacking direction.

14. A multilayer capacitor comprising:

a capacitor body including a dielectric layer and a plurality of internal electrodes; and

a pair of external electrodes disposed on opposing ends of the capacitor body and connected to exposed portions of the plurality of internal electrodes,

wherein the pair of external electrodes each include:

a conductive layer disposed on one end surface of the capacitor body;

a conductive resin layer disposed to cover a portion of the conductive layer and having a cutout portion through which a portion of at least one outer edge of the conductive layer disposed on the one end surface is exposed; and

a plating layer disposed to cover the conductive layer and the conductive resin layer and contacting a portion of the conductive layer through the cutout portion,

wherein the cutout portion extends to an outermost boundary of the conductive resin layer in a direction parallel to the one end surface,

wherein the cutout portion is located at a center of the conductive resin layer so that a center of the conductive layer is exposed,

wherein the cutout portion extends to be elongated from the center of the conductive resin layer such that a portion of a first edge of the conductive layer or a portion of a second edge of the conductive layer is exposed to be in contact with the plating layer, the first and second edges of the conductive layer opposing each other, and

wherein a length of the exposed portion of the first or second edge of the conductive layer is smaller than a length of the cutout portion located at the center of the conductive resin layer.

15. The multilayer capacitor of claim 14 , wherein

the cutout portion extends such that a portion of each of the first and second edges, and a portion of each of a third and fourth edge, of the conductive layer is exposed to be in contact with the plating layer.

16. The multilayer capacitor of claim 14 , wherein each conductive layer includes a connection portion disposed on the one end surface of the capacitor body and connected to a portion of the plurality of internal electrodes, and a band portion extending from the connection portion onto a portion of a neighboring surface of the capacitor body connected to the one end surface of the capacitor body.

17. The multilayer capacitor of claim 16 , wherein the conductive resin layer extends along an outer surface of the band portion to be in contact with the neighboring surface of the capacitor body, and

the plating layer extends along an outer surface of the conductive resin layer to be in contact with the neighboring surface of the capacitor body.

18. The multilayer capacitor of claim 14 , wherein the dielectric layer and plurality of internal electrodes are arranged in a stacking direction, and

wherein the cutout portion includes a first portion and a second portion each linearly extending in a width direction of the capacitor body, the first portion having a length in the stacking direction which is greater than a length of the second portion in the stacking direction.

19. A multilayer capacitor comprising:

a capacitor body including a dielectric layer and a plurality of internal electrodes; and

a pair of external electrodes disposed on opposing ends of the capacitor body and connected to exposed portions of the plurality of internal electrodes,

wherein the pair of external electrodes each include:

a conductive layer disposed on one end surface of the capacitor body;

a conductive resin layer disposed to cover at least two corners among four corners of the conductive layer; and

a plating layer disposed to cover the conductive layer and the conductive resin layer,

wherein portions of the conductive resin layer respectively covering the at least two corners of the conductive layer are physically isolated from each other,

wherein a portion of an outer edge of the conductive layer disposed on the one end surface is exposed through a space between said portions of the conductive resin layer respectively covering the at least two corners of the conductive layer,

wherein a cutout portion is located at a center of the conductive resin layer so that a center of the conductive layer is exposed,

wherein the cutout portion extends to be elongated from the center of the conductive resin layer such that a portion of a first edge of the conductive layer or a portion of a second edge of the conductive layer is exposed to be in contact with the plating layer, the first and second edges of the conductive layer opposing each other, and

wherein a length of the exposed portion of the first or second edge of the conductive layer is smaller than a length of the cutout portion located at the center of the conductive resin layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2021
From: CHO, BEOM JOON
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 056476/0549 →
Priority Claims (1)
KR 10-2020-0146190 · Nov 4, 2020 · national
Continuity (1)
Related Publication 20220139626A1 · May 5, 2022