IP Library › Granted Patent US 11,849,235
Granted Patent B2
US 11,849,235 · App. 17/842,279 · Granted Dec 19, 2023

Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus

Inventors: Shunsuke Okura (Shiga, JP); Ai Otani (Shiga, JP); Ken Miyauchi (Tokyo, JP); Hideki Owada (Tokyo, JP); Sangman Han (Tokyo, JP); Isao Takayanagi (Tokyo, JP)
Assignees: Brillnics Singapore Pte. Ltd.; THE RITSUMEIKAN TRUST
H04N25/75H04N25/59H04N25/65H04N25/772H04N25/778
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Quick Facts
Patent No.
US 11,849,235
App. No.
17/842,279
Granted
Dec 19, 2023
Kind
B2
Abstract

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions. A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420 . Of a pixel signal PIXOUT input into an input node ND 401 , the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND 402 . Of the pixel signal PIXOUT input into the input node ND 401 , the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND 402.

Claims (129)

1. A solid-state imaging device comprising:

a readable pixel for performing photoelectric conversion, the readable pixel being configured to produce, as a readable pixel signal, a first-conversion-gain signal and a second-conversion-gain signal corresponding to at least two conversion gains and having opposite signal directions; and

a pixel signal processing part for processing the pixel signal read out from the readable pixel,

wherein the pixel signal processing part includes:

an input node for receiving the pixel signal read out from the readable pixel input thereto;

a connection node connected to a next-stage circuit;

a first reading part for inverting a signal direction of the first-conversion-gain signal of the pixel signal input into the input node and outputting an inverted first-conversion-gain signal to the connection node; and

a second reading part for keeping a signal direction of the second-conversion-gain signal of the pixel signal input into the input node unchanged and outputting a non-inverted second-conversion-gain signal to the connection node, and

wherein the first reading part includes:

a first operational amplifier whose inverting input terminal is connected to the input node;

a first input switch and a first sampling capacitor connected in series between the inverting input terminal of the first operational amplifier and the input node;

a feedback capacitor connected between (i) an output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal; and

a reset switch connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein the first input switch remains in a conduction state in a first-conversion-gain signal read-out mode, and

wherein a non-inverting input terminal of the first operational amplifier is connectable at least to a referential potential.

2. The solid-state imaging device according to claim 1 ,

wherein the second reading part includes a second input switch connected between the input node and the connection node, and

wherein the second input switch remains in a conduction state in a second-conversion-gain signal read-out mode.

3. The solid-state imaging device of claim 1 ,

wherein the pixel signal processing part includes a first operational amplifier shared between the first and second reading parts,

wherein the first reading part includes:

a third switch configured to selectively connect together the non-inverting input terminal and the referential potential,

wherein the second reading part includes:

a second input switch and a second sampling capacitor connected in series between the input node and the non-inverting input terminal; and

an attenuation capacitor connected between the non-inverting input terminal and a reference potential,

wherein the first input switch and the third switch remain in a conduction state in a first-conversion-gain signal read-out mode, and

wherein the second input switch and the reset switch remain in a conduction state in a second-conversion-gain signal read-out mode.

4. The solid-state imaging device of claim 3 , wherein the second reading part includes a fourth switch configured to connect, to the reference potential, at least a connection signal line extending between the second input switch and the non-inverting input terminal in the first-conversion-gain signal read-out mode.

5. The solid-state imaging device of claim 3 , comprising

a fifth switch configured to selectively connect (i) the non-inverting input terminal and (ii) a connection node between the second sampling capacitor and the attenuation capacitor.

6. The solid-state imaging device of claim 3 , wherein the first and second reading parts:

share a single capacitor serving as the first and second sampling capacitors; and

share a single capacitor serving as the feedback capacitor and the attenuation capacitors.

7. The solid-state imaging device of claim 6 ,

wherein the input node is connected to the sampling capacitor,

wherein the first input switch is connected between the sampling capacitor and an inverting input terminal of the first operational amplifier,

wherein the second input switch is connected between the sampling capacitor and the non-inverting input terminal of the first operational amplifier,

wherein the feedback capacitor is connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein the reset switch is connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal, and

wherein a sixth switch is connected between a first one of electrodes of the feedback capacitor and the inverting input terminal of the first operational amplifier,

wherein a seventh switch is connected between a second one of the electrodes of the feedback capacitor and the output terminal of the first operational amplifier,

wherein an eighth switch is connected between the first one of the electrodes of the feedback capacitor and the non-inverting input terminal of the first operational amplifier,

wherein a ninth switch is connected between the second one of the electrodes of the feedback capacitor and the reference potential, and

wherein the third switch is connected between (i) the non-inverting input terminal of the first operational amplifier and (ii) the referential potential.

8. The solid-state imaging device of claim 7 ,

wherein in the first-conversion-gain signal read-out mode, the first input switch, the third switch, the sixth switch and the seventh switch remain in a conduction state, and the second input switch, the reset switch, the eighth switch, and the ninth switch remain in a non-conduction state, and

wherein in the second-conversion-gain signal read-out mode, the first input switch, the third switch, the sixth switch and the seventh switch remain in a non-conduction state, and the second input switch, the reset switch, the eighth switch, and the ninth switch remain in a conduction state.

9. The solid-state imaging device of claim 3 , wherein the first and second reading parts share a single capacitor serving as the first and second sampling capacitors.

10. The solid-state imaging device of claim 9 ,

wherein the input node is connected to the sampling capacitor,

wherein the first input switch is connected between the sampling capacitor and the inverting input terminal of the first operational amplifier,

wherein the second input switch is connected between the sampling capacitor and the non-inverting input terminal of the first operational amplifier,

wherein the feedback capacitor is connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein the reset switch is connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein a tenth switch is connected between (i) a connection node between a first one of electrodes of the sampling capacitor and the first and second switches and (ii) the attenuation capacitor, and

wherein the third switch is connected between (i) the non-inverting input terminal of the first operational amplifier and (ii) the referential potential.

11. The solid-state imaging device of claim 10 ,

wherein in the first-conversion-gain signal read-out mode, the first input switch and the third switch remain in a conduction state, and the reset switch and the tenth switch remain in a non-conduction state, and

wherein in the second-conversion-gain signal read-out mode, the first input switch and the third switch remain in a non-conduction state, and the reset switch and the tenth switch remain in a conduction state.

12. The solid-state imaging device of claim 1 ,

wherein, in the first operational amplifier, the inverting input terminal has, in addition to a first inverting input terminal serving as the inverting input terminal, at least a second inverting input terminal,

wherein the first reading part further includes:

a third input switch and a third sampling capacitor connected in series between the second inverting input terminal of the first operational amplifier and the input node;

a second feedback capacitor connected between (i) an output terminal of the first operational amplifier connected to the connection node and (ii) the second inverting input terminal; and

a second reset switch connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the second inverting input terminal.

13. The solid-state imaging device of claim 12 ,

wherein the first input switch remains in a conduction state in a first-conversion-gain signal read-out mode,

wherein the second input switch remains in a conduction state in a second-conversion-gain signal read-out mode, and

wherein the third input switch remains in a conduction state in a third-conversion-gain signal read-out mode applying a third conversion gain between the first and second conversion gains.

14. The solid-state imaging device of claim 1 ,

wherein the readable pixel is configured to produce, as a readable pixel signal, a first-conversion-gain signal and a second-conversion-gain signal corresponding to two conversion gains and having opposite signal directions, and

wherein, in the pixel signal processing part, the first reading part performs, in a first-conversion-gain signal read-out mode, inversion read-out for a first read-out reset signal produced with a first conversion gain, and subsequently inversion read-out for a first read-out luminance signal produced with the first conversion gain, and

the second reading part performs, in a second-conversion-gain signal read-out mode, non-inversion read-out for a second read-out luminance signal produced with a second conversion gain, and subsequently non-inversion read-out for a second read-out reset signal produced with the second conversion gain.

15. The solid-state imaging device of claim 12 ,

wherein the readable pixel is configured to produce, as a readable pixel signal, a first-conversion-gain signal and a second-conversion-gain signal corresponding to respective conversion gains and having opposite signal directions,

wherein, in the pixel signal processing part,

the first reading part:

performs inversion read-out for a third read-out reset signal produced with a third conversion gain between the first conversion gain and the second conversion gain;

subsequently performs inversion read-out for a first read-out reset signal produced with a first conversion gain;

subsequently performs inversion read-out for a first read-out luminance signal produced with the first conversion gain; and

subsequently performs inversion read-out for a third read-out luminance signal produced with the third conversion gain, and

the second reading part:

performs non-inversion read-out for a second read-out luminance signal produced with the second conversion gain; and

subsequently performs non-inversion read-out for a second read-out reset signal produced with the second conversion gain.

16. The solid-state imaging device of claim 1 ,

wherein the pixel signal processing part includes an analog-to-digital (AD) converting part for analog-to-digital converting the pixel signal that is processed by the first and second reading parts and output from the connection node,

wherein the first reading part or the AD converting part includes:

a sample-and-hold switch arranged on a connecting line between an output terminal of a first operational amplifier and the connection node,

wherein the AD converting part includes:

a second operational amplifier;

an input capacitor connected between an inverting input terminal of the second operational amplifier and the sample-and-hold switch;

an eleventh switch connected to the inverting input terminal of the second operational amplifier, the eleventh switch being configured to remain in a conduction state in the second-conversion-gain signal read-out mode;

a sample-and-hold capacitor connected between the eleventh switch and a reference potential; and

a third reset switch connected between the inverting input terminal of the second operational amplifier and an output terminal of the second operational amplifier, the third reset switch being configured to remain in a conduction state in the second-conversion-gain signal read-out mode, and

wherein a non-inverting input terminal of the second operational amplifier is connectable to a referential potential or the output terminal of the second operational amplifier.

17. A method for driving a solid-state imaging device, the solid-state imaging device including:

a readable pixel for performing photoelectric conversion, the readable pixel being configured to produce, as a readable pixel signal, a first-conversion-gain signal and a second-conversion-gain signal corresponding to at least two conversion gains and having opposite signal directions; and

a pixel signal processing part for processing the pixel signal read out from the readable pixel,

wherein the pixel signal processing part includes:

an input node for receiving the pixel signal read out from the readable pixel input thereto;

a connection node connected to a next-stage circuit;

a first reading part for inverting a signal direction of the first-conversion-gain signal of the pixel signal input into the input node and outputting an inverted first-conversion-gain signal to the connection node; and

a second reading part for keeping a signal direction of the second-conversion-gain signal of the pixel signal input into the input node unchanged and outputting a non-inverted second-conversion-gain signal to the connection node,

wherein the first reading part performs, in a first-conversion-gain signal read-out mode, inversion read-out for a first read-out reset signal produced with a first conversion gain, and subsequently inversion read-out for a first read-out luminance signal produced with the first conversion gain, and the second reading part performs, in a second-conversion-gain signal read-out mode, non-inversion read-out for a second read-out luminance signal produced with a second conversion gain, and subsequently non-inversion read-out for a second read-out reset signal produced with the second conversion gain,

wherein the first reading part includes:

a first operational amplifier whose inverting input terminal is connected to the input node;

a first input switch and a first sampling capacitor connected in series between the inverting input terminal of the first operational amplifier and the input node;

a feedback capacitor connected between (i) an output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal; and

a reset switch connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein the first input switch remains in a conduction state in a first-conversion-gain signal read-out mode, and

wherein a non-inverting input terminal of the first operational amplifier is connectable at least to a referential potential.

18. An electronic apparatus comprising:

a solid-state imaging device; and

an optical system for forming a subject image on the solid-state imaging device,

wherein the solid-state imaging device includes:

a readable pixel for performing photoelectric conversion, the readable pixel being configured to produce, as a readable pixel signal, a first-conversion-gain signal and a second-conversion-gain signal corresponding to at least two conversion gains and having opposite signal directions; and

a pixel signal processing part for processing the pixel signal read out from the readable pixel,

wherein the pixel signal processing part includes:

an input node for receiving the pixel signal read out from the readable pixel input thereto;

a connection node connected to a next-stage circuit;

a first reading part for inverting a signal direction of the first-conversion-gain signal of the pixel signal input into the input node and outputting an inverted first-conversion-gain signal to the connection node; and

a second reading part for keeping a signal direction of the second-conversion-gain signal of the pixel signal input into the input node unchanged and outputting a non-inverted second-conversion-gain signal to the connection node,

wherein the first reading part includes:

a first operational amplifier whose inverting input terminal is connected to the input node;

a first input switch and a first sampling capacitor connected in series between the inverting input terminal of the first operational amplifier and the input node;

a feedback capacitor connected between (i) an output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal; and

a reset switch connected between (i) the output terminal of the first operational amplifier connected to the connection node and (ii) the inverting input terminal,

wherein the first input switch remains in a conduction state in a first-conversion-gain signal read-out mode, and

wherein a non-inverting input terminal of the first operational amplifier is connectable at least to a referential potential.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2022
From: MIYAUCHI, KEN; OWADA, HIDEKI; HAN, SANGMAN; TAKAYANAGI, ISAO
To: BRILLNICS SINGAPORE PTE. LTD.
Reel/Frame 060697/0072 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2022
From: OKURA, SHUNSUKE; OTANI, AI
To: THE RITSUMEIKAN TRUST
Reel/Frame 060697/0303 →
Continuity (1)
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