IP Library Granted Patent US 11,853,660
Granted Patent B2
US 11,853,660 · App. 17/231,428 · Granted Dec 26, 2023

System and method for modeling a semiconductor fabrication process

Inventors: Hyunjoong Kim (Seoul, KR); Jaepil Shin (Suwon-si, KR); Moonhyun Cha (Yongin-si, KR); Changwook Jeong (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F30/27G06N3/045G06N3/08G06F2119/02G06F2119/18
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Quick Facts
Patent No.
US 11,853,660
App. No.
17/231,428
Granted
Dec 26, 2023
Kind
B2
Abstract

A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.

Claims (40)

1. A system for modeling a semiconductor fabrication process, the system comprising:

at least one first processor configured to provide at least one machine learning model, the at least one machine learning model being trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample, the physical pattern sample being formed from the design pattern sample by using the semiconductor fabrication process; and

at least one second processor configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor,

wherein the at least one machine learning model comprises a generative adversarial network comprising a generator and a discriminator, which are trained by using the plurality of pairs of images,

wherein the at least one second processor is configured to provide the input image to the generator and to generate the output data based on an output image received from the generator,

wherein the at least one second processor is configured to train the machine learning model based on a pair of images of a first design pattern sample and a first physical pattern sample, which correspond to each other, by calculating a first loss based on an error between an image of the first physical pattern sample and a first output image of the generator, wherein the first output image corresponds to the first design pattern sample,

calculating a second loss between a first output of the discriminator and a second output of the discriminator, wherein the first output of the discriminator corresponds to the first physical pattern sample, and the second output of the discriminator corresponds to the first output image, and

training the generator and the discriminator to reduce a sum of the first loss and the second loss.

2. The system of claim 1 , wherein the at least one second processor is configured to calculate the second loss by calculating a first term that increases as the first output increases,

calculating a second term that decreases as the second output increases, and

summing the first term and the second term.

3. The system of claim 1 , wherein the design pattern and the design pattern sample correspond to a pattern formed in a reticle used for an exposure process included in a photolithography process.

4. A method comprising:

generating an input image representing a shape of a design pattern;

providing the input image to a machine learning model, the machine learning model being trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample, the physical pattern sample being formed from the design pattern sample using a semiconductor fabrication process, the design pattern and the design pattern sample corresponding to a pattern formed in a reticle used for an exposure process included in a photolithography process;

generating output data defining a physical pattern corresponding to the design pattern based on an output image provided from the machine learning model;

preparing the reticle from the design pattern which is calibrated based on the output data;

performing the photolithography process using the reticle; and

training the machine learning model based on a pair of images of the calibrated design pattern and the physical pattern formed using the photolithography process.

5. The method of claim 4 , wherein the machine learning model comprises a generative adversarial network comprising a generator and a discriminator, which are trained by using the plurality of pairs of images,

wherein the providing of the input image to the machine learning model comprises providing the input image to the generator, and

wherein the generating of the output data comprises generating the output data based on an output image provided from the generator.

6. The method of claim 4 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after a developing process included in the photolithography process.

7. The method of claim 4 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after an etching process and a cleaning process, which are included in the photolithography process.

8. The method of claim 4 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after a developing process included in the photolithography process.

9. The method of claim 4 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after an etching process and a cleaning process, which are included in the photolithography process.

10. A system for modeling a semiconductor fabrication process, the system comprising:

at least one first processor configured to provide at least one machine learning model, the at least one machine learning model being trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample, the physical pattern sample being formed from the design pattern sample by using the semiconductor fabrication process; and

at least one second processor configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor,

wherein the at least one machine learning model comprises a generative adversarial network comprising a generator and a discriminator, which are trained by using the plurality of pairs of images,

wherein the at least one second processor is configured to provide the input image to the generator and to generate the output data based on an output image received from the generator,

wherein the at least one second processor is configured to train the machine learning model based on a pair of images of a first physical pattern sample and a first design pattern sample, which correspond to each other, by calculating a first loss based on an error between an image of the first design pattern sample and a first output image of the generator, wherein the first output image of the generator corresponds to the first physical pattern sample,

calculating a second loss based on a first output of the discriminator and a second output of the discriminator, wherein the first output of the discriminator corresponds to the first design pattern, and the second output of the discriminator corresponds to the first output image, and

training the generator and the discriminator to reduce the sum of the first loss and the second loss.

11. The system of claim 10 , wherein the at least one second processor is configured to calculate the second loss by calculating a first term that increases as the first output increases,

calculating a second term that decreases as the second output increases, and

summing the first term and the second term.

12. The system of claim 10 , wherein the design pattern and the design pattern sample correspond to a pattern formed in a reticle used for an exposure process included in a photolithography process.

13. The system of claim 12 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after a developing process included in the photolithography process.

14. The system of claim 12 , wherein the physical pattern and the physical pattern sample correspond to a pattern formed after an etching process and a cleaning process, which are included in the photolithography process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2021
From: KIM, HYUNJOONG; SHIN, JAEPIL; CHA, MOONHYUN; JEONG, CHANGWOOK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 055931/0308 →
Priority Claims (1)
KR 10-2020-0123319 · Sep 23, 2020 · national
Continuity (1)
Related Publication 20220092239A1 · Mar 24, 2022