Acceleration of model/weight programming in memristor crossbar arrays
A crossbar array includes a number of memory elements. An analog-to-digital converter (ADC) is electronically coupled to the vector output register. A digital-to-analog converter (DAC) is electronically coupled to the vector input register. A processor is electronically coupled to the ADC and to the DAC. The processor may be configured to determine whether division of input vector data by output vector data from the crossbar array is within a threshold value, and if not within the threshold value, determine changed data values as between the output vector data and the input vector data, and write the changed data values to the memory elements of the crossbar array.
1. A memristive dot product system for vector processing, comprising:
a crossbar array having a number of memory elements, the crossbar array having N rows, M columns and N×M memory elements;
a vector input register comprising N voltage inputs to the crossbar array;
a vector output register comprising M voltage outputs from the crossbar array; and
an analog-to-digital converter (ADC) electronically coupled to the vector output register;
a digital-to-analog converter (DAC) electronically coupled to the vector input register;
a comparator processor electronically coupled to the ADC and to the DAC, the comparator processor configured to:
compare output vector data from the vector output register to input vector data from a memory register;
determine changed data values as between the output vector data and the input vector data; and
write the changed data values to the memory elements of the crossbar array.
2. The dot product system of claim 1 , wherein the comparator processor includes an EXOR circuit that calculates an exclusive OR between the input vector data and the output vector data to determine the changed data values.
3. The dot product system of claim 1 , wherein the comparator processor includes a circuit to retrieve output vector data via the ADC for a row of the crossbar array.
4. The dot product system of claim 1 , wherein the comparator processor includes a circuit to write the changed data values via the DAC to a memory element of the crossbar array.
5. The dot product system of claim 1 , wherein the memory register for the input vector data is a memory location distinct from the memory elements of the crossbar array.
6. The dot product system of claim 1 , wherein the input vector data is data representing an n-dimensional vector of numerical values.
7. The dot product system of claim 1 , wherein the input vector data describes a plurality of model weights for training a neural network.
8. A method comprising:
receiving a set of output vector data rom an output of a memristor crossbar array, the memristor crossbar array having a number of memory elements, the crossbar array having N rows, M columns and N×M memory elements;
receiving from a memory register a set of input vector data;
evaluating the set of output vector data to the set of input vector data;
determining changed data values as between the output vector data and the input vector data; and
writing the changed data values to the to the memory elements of the crossbar array.
9. The method of claim 8 , wherein evaluating the set of output vector data to the set of input vector data comprises:
performing an operation to determine whether an absolute value of the input vector data divided by the output vector data is less than a predetermined threshold value, wherein the output vector data represents weight values and the input vector data represents delta weight values.
10. The method of claim 8 , wherein the set of output vector data is received via an ana log-to-digital converter electronically coupled to the crossbar array.
11. The method of claim 8 , wherein the changed data values are written to the memory elements of the crossbar array via a digital-to-analog converter electronically coupled to the crossbar array.
12. The method of claim 8 , wherein the memory register for the input vector data is a memory location distinct from the memory elements of the memristor.
13. The method of claim 8 , wherein the input vector data is data representing an n-dimensional vector of numerical values.
14. The method of claim 8 , wherein the input vector data describes a plurality of model weights for training a neural network.
15. A non-transitory computer storage device storing instructions operable to cause one or more computer methods to perform operations comprising:
receiving a set of output vector data from an output of a memristor crossbar array, the memristor crossbar array having a number of memory elements, the crossbar array having N rows, M columns and N×M memory elements;
receiving from a memory register a set of input vector data;
comparing the set of output vector data to the set of input vector data;
determining changed data values as between the output vector data and the input vector data; and
writing the changed data values to the to the memory elements of the crossbar array.
16. The non-transitory computer storage device of claim 5 , wherein comparing the set of output vector data to the set of input vector data comprises:
performing an exclusive OR operation between the input vector data and the output vector data to determine the changed data values.
17. The non-transitory computer storage device of claim 15 , wherein the set of output vector data is received via an analog-to-digital converter electronically coupled to the crossbar array.
18. The non-transitory computer storage device of claim 15 , wherein the changed data values are written to the memory elements of the crossbar array via a digital-to-analog converter electronically coupled to the crossbar array.
19. The non-transitory computer storage device of claim 15 , wherein the memory register for the input vector data is a memory location distinct from the memory elements of the memristor.
20. The non-transitory computer storage device of claim 15 , wherein the input vector data is data representing an n-dimensional vector of numerical values.