IP Library › Granted Patent US 11,855,126
Granted Patent B2
US 11,855,126 · App. 17/534,431 · Granted Dec 26, 2023

Semiconductor device including metal insulator metal capacitor and method of making

Inventors: Yan-Jhih Huang (Hsinchu, TW); Chun-Yuan Hsu (Hsinchu, TW); Chien-Chung Chen (Hsinchu, TW); Yung-Hsieh Lin (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L28/60H01L23/5223H01L28/87H01L23/5222H01L27/0207H01L28/40H01L29/40114H01L2924/00H01L2924/0002H10B41/30
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Quick Facts
Patent No.
US 11,855,126
App. No.
17/534,431
Granted
Dec 26, 2023
Kind
B2
Abstract

A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line electrically connected to the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer. The capacitor further includes an insulator surrounding the first conductor.

Claims (40)

1. A semiconductor device, comprising:

a substrate;

a circuit layer over the substrate;

a test line electrically connected to the circuit layer; and

a capacitor on the substrate, the capacitor comprising:

a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer; and

an insulator surrounding the first conductor.

2. The semiconductor device of claim 1 , wherein the insulator further surrounds the test line.

3. The semiconductor device of claim 1 , wherein the capacitor further comprises a second conductor, and the insulator is between the first conductor and the second conductor.

4. The semiconductor device of claim 3 , wherein the first conductor is between the circuit layer and the second conductor.

5. The semiconductor device of claim 3 , wherein the second conductor is on the portion of the substrate exposed by the circuit layer.

6. The semiconductor device of claim 1 , wherein the test line directly connects to the circuit layer.

7. The semiconductor device of claim 1 , further comprising a via electrically connecting the test line to the circuit layer.

8. The semiconductor device of claim 1 , wherein the circuit layer is electrically connected to the capacitor.

9. The semiconductor device of claim 8 , wherein the circuit layer comprises a memory device electrically connected to the capacitor.

10. The semiconductor device of claim 1 , wherein the test line has a serpentine shape.

11. A semiconductor device, comprising:

a substrate;

a circuit layer over the substrate;

a test line electrically connected to the circuit layer; and

a capacitor, wherein an entirety of the capacitor is on a portion of the substrate exposed by the circuit layer, the capacitor comprising:

a first conductor;

a second conductor; and

an insulator between the first conductor and the second conductor.

12. The semiconductor device of claim 11 , wherein the circuit layer is electrically connected to the capacitor.

13. The semiconductor device of claim 11 , wherein the insulator is between the capacitor and the test line.

14. The semiconductor device of claim 11 , wherein a height of the first conductor from a top surface of the insulator to the substrate is greater than a height of the test line from the top surface of the insulator to the circuit layer.

15. The semiconductor device of claim 11 , wherein the second conductor is between the first conductor and the circuit layer.

16. The semiconductor device of claim 11 , wherein the test line comprises a same material as at least one of the first conductor or the second conductor.

17. A semiconductor device, comprising:

a substrate;

a circuit layer over the substrate;

a test line electrically connected to the circuit layer; and

a capacitor on the substrate, the capacitor comprising:

a first conductor, wherein the first conductor is on a first portion of the substrate exposed by the circuit layer;

a second conductor, wherein the second conductor is on a second portion of the substrate exposed by the circuit layer; and

an insulator between the first conductor and the second conductor.

18. The semiconductor device of claim 17 , wherein the insulator is between the first conductor and the test line.

19. The semiconductor device of claim 17 , wherein the insulator surrounds the first conductor and surrounds the second conductor.

20. The semiconductor device of claim 17 , wherein a top-most surface of the test line is coplanar with a top-most surface of the insulator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2021
From: HUANG, YAN-JHIH; HSU, CHUN-YUAN; CHEN, CHIEN-CHUNG; LIN, YUNG-HSIEH
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 058201/0172 →
Continuity (3)
Continuation 16780686 · Feb 3, 2020
Division 14103651 · Dec 11, 2013
Related Publication 20220085148A1 · Mar 17, 2022