Display panel and manufacturing method thereof
View Patent ↗The present disclosure provides a display panel and a manufacturing method for the display panel. The display panel includes a substrate, a switch assembly disposed on the substrate, and a light-sensing assembly disposed on a side of the switch assembly. The switch assembly comprises an indium gallium zinc oxide (IGZO) layer.
1. A method of manufacturing a display panel, comprising:
providing a substrate;
forming a switch assembly on the substrate, the switch assembly comprising an indium gallium zinc oxide (IGZO) layer; and
forming a light-sensing assembly to a side of the switch assembly;
wherein the operation of forming the switch assembly comprising the IGZO layer on the substrate comprises forming an etching barrier layer on the IGZO layer; and
wherein the operation of forming the light-sensing assembly to the side of the switch assembly comprises forming the light-sensing assembly on an extended portion of the etching barrier layer.
2. The method according to claim 1 , wherein the operation of forming the switch assembly comprises:
providing a glass substrate as the substrate;
forming a gate electrode metal layer, a gate insulation layer, the IGZO layer, an etching barrier layer, a source electrode layer, and a drain electrode layer on the substrate in sequence thus forming the switch assembly, wherein the source electrode layer and the drain electrode layer are located in a same layer.
3. The method according to claim 1 , wherein the operation of forming the light-sensing assembly on the extended portion of the etching barrier layer comprises:
forming a light-sensing metal layer on the extended portion of the etching barrier layer;
forming the light-sensing assembly on the light-sensing metal layer; and
forming a transparent conducting layer on the light-sensing assembly.
4. The method according to claim 3 , wherein the operation of forming the light-sensing assembly on the light-sensing metal layer comprises:
forming a P-type semiconductor layer on the light-sensing metal layer;
forming an intrinsic semiconductor layer on the P-type semiconductor layer; and
forming an N-type semiconductor layer on the intrinsic semiconductor layer.
5. The method according to claim 4 , further comprising disposing a passivation layer to cover the switch assembly and the light-sensing assembly.
6. The method according to claim 5 , further comprising disposing a transparent conducting layer on the passivation layer at positions corresponding to the switch assembly and the light-sensing assembly.
7. The method according to claim 2 , wherein a light-sensing metal layer is disposed on the extended portion of the etching barrier layer and the light-sensing assembly is disposed on the light-sensing metal layer;
wherein the light-sensing metal layer, the source electrode layer, and the drain electrode layer are located in a same layer.